Sleep transistor distribution in row-based MTCMOS designs

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 235-240

  Hwang, Chanseok ^a   Rong, Peng ^b   Pedram, Massoud ^c  

^a Samsung Advanced Institute of Technology (SAIT)   (South Korea)

^b AGERE SYSTEMS   (United States)

^c UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

Leakage minimization; MTCMOS; Placement

Indexed keywords

ALGORITHMS; CRITICAL PATH ANALYSIS; LEAKAGE CURRENTS; STANDBY POWER SERVICE; VIRTUAL REALITY; VLSI CIRCUITS;

LEAKAGE MINIMIZATION; MULTI-THRESHOLD CMOS (MTCMOS) TECHNOLOGY; STANDBY POWER REDUCTION; THRESHOLD LEAKAGE CURRENTS;

CMOS INTEGRATED CIRCUITS;

EID: 34748925497     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228786     Document Type: Conference Paper

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