Leakage control through fine-grained placement and sizing of sleep transistors

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2004, Pages 533-536

  Khandelwal, Vishal ^a   Srivastava, Ankur ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SLACK UTILIZATION; FINE-GRAINED PLACEMENT; SLEEP TRANSISTOR PLACEMENT; SLEEP TRANSISTORS;

CONSTRAINT THEORY; DELAY CIRCUITS; ELECTRIC NETWORK ANALYSIS; GATES (TRANSISTOR); MATHEMATICAL MODELS; PROBLEM SOLVING; SIGNAL PROCESSING;

LEAKAGE CURRENTS;

EID: 16244414309     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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