Silicon carrier for computer systems

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 857-862

  Patel, Chirag S ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Chip package co design; CMOS scaling; Computer system; Electrical modeling; Micro bumps; Silicon carrier; System on package

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SYSTEMS; ELECTRIC PROPERTIES; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS;

CHIP-PACKAGE CO-DESIGN; CMOS SCALING; ELECTRICAL MODELING; MICRO BUMPS; SILICON CARRIER; SYSTEM ON PACKAGE;

SILICON COMPOUNDS;

EID: 34547160419     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1147128     Document Type: Conference Paper

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