Partitioning-based approach to fast on-chip decoupling capacitor budgeting and minimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 11, 2006, Pages 2402-2411

  Li, Hang ^a,b   Fan, Jeffrey ^a,b   Qi, Zhenyu ^a,b   Tan, Sheldon X D ^a,b   Wu, Lifeng ^a,c   Cai, Yici ^a,d   Hong, Xianlong ^a,d  

^a IEEE   (United States)

^b University of California Riverside   (United States)

^c CADENCE DESIGN SYSTEMS   (United States)

^d TSINGHUA UNIVERSITY   (China)

Author keywords

Decoupling capacitor; IR drop; On chip power grid networks

Indexed keywords

CONJUGATE GRADIENT (CG); DECOUPLING CAPACITORS; INFRA RED DROP; ON CHIP POWER GRID NETWORK;

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER CIRCUITS; ESTIMATION; INFRARED RADIATION; OPTIMIZATION;

CAPACITORS;

EID: 33750602844     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.870862     Document Type: Article

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