Power supply noise analysis methodology for deep-submicron VLSI chip design

Proceedings - Design Automation Conference

Volumn , Issue , 1997, Pages 638-643

  Chen, Howard H ^a   Ling, David D ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; OPTIMIZATION; SWITCHING CIRCUITS;

ON CHIP DECOUPLING CAPACITORS; PARASITIC INDUCTORS; POWER SUPPLY NOISE ANALYSIS METHODOLOGY;

VLSI CIRCUITS;

EID: 0030704451     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/266021.266307     Document Type: Conference Paper

References (9)