Chemical analysis of deposits formed on the reactor walls during silicon and metal gate etching processes

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 24, Issue 5, 2006, Pages 2191-2197

  Le Gouil, A ^a   Pargon, E ^a   Cunge, G ^a   Joubert, O ^a   Pelissier, B ^a  

^a CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COATINGS; COMPOSITION; ETCHING; LAYERED MANUFACTURING; SILICON; WSI CIRCUITS;

GATE ETCHING; GATE STACK; METAL GATE; PLASMA CHAMBER; REACTOR WALLS;

GATES (TRANSISTOR);

EID: 33749347897     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.2232417     Document Type: Article

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