Static compaction of delay tests considering power supply noise

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2005, Pages 235-240

  Wang, Jing ^a   Lu, Xiang ^b   Qiu, Wangqi ^a   Yue, Ziding ^b   Fancler, Steve ^a   Shi, Weiping ^b   Walker, D M H ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

^b Department of Electrical and Computer Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPACTION PROCESS; DELAY TESTS; POWER GRIDS; POWER-SUPPLY NOISE; STATIC COMPACTION;

COMPACTION; DELAY CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 33748581693     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2005.77     Document Type: Conference Paper

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