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Volumn 14, Issue 7, 2006, Pages 667-679

Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia

Author keywords

Multimedia computing; Multiprocessor interconnection; Parallel programming

Indexed keywords

DISTRIBUTED SYSTEM OBJECT COMPONENT (DSOC); MULTIMEDIA COMPUTING; MULTIPROCESSOR INTERCONNECTION; PARALLEL PROGRAMMING;

EID: 33746895871     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.878259     Document Type: Conference Paper
Times cited : (69)

References (27)
  • 1
    • 0141717701 scopus 로고    scopus 로고
    • Closing the SoC design gap
    • Oct.
    • J. Henkel, "Closing the SoC design gap," IEEE Comput. Mag., pp. 119-121, Oct. 2003.
    • (2003) IEEE Comput. Mag. , pp. 119-121
    • Henkel, J.1
  • 3
    • 33746868960 scopus 로고    scopus 로고
    • A. Jantsch and H. Tenhunen, Eds., Networks on Chip Kluwer Academic Publishers, 2003
    • A. Jantsch and H. Tenhunen, Eds., Networks on Chip Kluwer Academic Publishers, 2003.
  • 4
    • 1142275623 scopus 로고    scopus 로고
    • Programmers' views of SoCs
    • J. M. Paul, "Programmers' views of SoCs," in Proc. CODES/ISSS, 2003, pp. 156-161.
    • (2003) Proc. CODES/ISSS , pp. 156-161
    • Paul, J.M.1
  • 5
    • 0036149420 scopus 로고    scopus 로고
    • NoC: A new SoC paradigm
    • Jan.
    • L. Benini and G. De Micheli, "NoC: A new SoC paradigm," Computer, vol. 35, no. 1, pp. 70-78, Jan. 2002.
    • (2002) Computer , vol.35 , Issue.1 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 6
    • 33746899060 scopus 로고    scopus 로고
    • Networks on a chip
    • G. DeMicheli, "Networks on a chip," in Proc. MPSoC, 2003, pp. 5-36.
    • (2003) Proc. MPSoC , pp. 5-36
    • Demicheli, G.1
  • 7
    • 0034428118 scopus 로고    scopus 로고
    • System level design: Orthogonalization of concerns and platform-based design
    • Dec.
    • K. Keutzer, "System level design: Orthogonalization of concerns and platform-based design," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 19, no. 12, pp. 1523-1543, Dec. 2000.
    • (2000) IEEE Trans. Comput.-aided Des. Integr. Circuits Syst. , vol.19 , Issue.12 , pp. 1523-1543
    • Keutzer, K.1
  • 9
    • 33746924103 scopus 로고    scopus 로고
    • Design and programming of embedded multiprocessors: An interface-centric approach
    • Boca Raton, FL: CRC
    • P. van der Wolf, "Design and programming of embedded multiprocessors: An interface-centric approach," in Embedded Systems Handbook. Boca Raton, FL: CRC, 2006.
    • (2006) Embedded Systems Handbook
    • Van Der Wolf, P.1
  • 10
    • 0043136696 scopus 로고    scopus 로고
    • A complexity effective communication model for behavioral modeling of signal processing application
    • S. Kiran, "A complexity effective communication model for behavioral modeling of signal processing application," in Proc. 40th Des. Autom. Conf., 2003, pp. 412-415.
    • (2003) Proc. 40th Des. Autom. Conf. , pp. 412-415
    • Kiran, S.1
  • 11
    • 0036760609 scopus 로고    scopus 로고
    • A scalable high-performance computing solution for network on chip
    • Sep. - Oct.
    • M. Forsell, "A scalable high-performance computing solution for network on chip," IEEE Micro, vol. 22, no. 5, pp. 46-55, Sep. - Oct. 2002.
    • (2002) IEEE Micro , vol.22 , Issue.5 , pp. 46-55
    • Forsell, M.1
  • 12
    • 3042651236 scopus 로고    scopus 로고
    • Application of a multi-processor SoC platform to high-speed packet forwarding
    • P. G. Paulin, "Application of a multi-processor SoC platform to high-speed packet forwarding," in Proc. DATE (Designer Forum), 2004, pp. 58-63.
    • (2004) Proc. DATE (Designer Forum) , pp. 58-63
    • Paulin, P.G.1
  • 13
    • 0036857007 scopus 로고    scopus 로고
    • StepNP: A system-level exploration platform for network processors
    • Nov.
    • P. G. Paulin, C. Pilkington, and E. Bensoudane, "StepNP: A system-level exploration platform for network processors," IEEE Des. Test Comput., vol. 19, no. 6, pp. 17-26, Nov. 2002.
    • (2002) IEEE Des. Test Comput. , vol.19 , Issue.6 , pp. 17-26
    • Paulin, P.G.1    Pilkington, C.2    Bensoudane, E.3
  • 14
    • 3042610030 scopus 로고    scopus 로고
    • A system-level exploration platform and methodology for network applications based on configurable processors
    • D. Quinn, "A system-level exploration platform and methodology for network applications based on configurable processors," in Proc. Des. Autom. Test Eur. (DATE), 2004, pp. 364-369.
    • (2004) Proc. Des. Autom. Test Eur. (DATE) , pp. 364-369
    • Quinn, D.1
  • 15
    • 0042194657 scopus 로고    scopus 로고
    • A 0.18 μm, 1GOPS reconfigurable signal processing IC with embedded FPGA and 1.2 GB/s, 3-Port flash memory subsystem
    • M. Borgatti, "A 0.18 μm, 1GOPS reconfigurable signal processing IC with embedded FPGA and 1.2 GB/s, 3-Port flash memory subsystem," in Proc. Int. Solid-State Circuits Conf. (ISSC), 2003, pp. 50-55.
    • (2003) Proc. Int. Solid-State Circuits Conf. (ISSC) , pp. 50-55
    • Borgatti, M.1
  • 16
    • 33746890917 scopus 로고    scopus 로고
    • Supporting Fine-grained synchronization on a simultaneous multithreading processor UCSD
    • D. M. Tullsen, Supporting Fine-Grained Synchronization on a Simultaneous Multithreading Processor UCSD, CSE Tech. Rep. CS98-587, 1998.
    • (1998) CSE Tech. Rep. , vol.CS98-587
    • Tullsen, D.M.1
  • 17
    • 84954419743 scopus 로고    scopus 로고
    • A comparison of the RTU hardware RTOS with HW/SW RTOS
    • J. Lee, "A comparison of the RTU hardware RTOS with HW/SW RTOS," in Proc. ASP-DAC, 2003, pp. 683-688.
    • (2003) Proc. ASP-DAC , pp. 683-688
    • Lee, J.1
  • 18
    • 1142299902 scopus 로고    scopus 로고
    • Hardware support for real-time operating systems
    • P. Kohout, "Hardware support for real-time operating systems," in Proc. Codes-ISSS, 2003, pp. 45-51.
    • (2003) Proc. Codes-ISSS , pp. 45-51
    • Kohout, P.1
  • 20
    • 0032597901 scopus 로고    scopus 로고
    • A MPEG4 programmable CODEC DSP with an embedded pre/post-processing engine
    • S. Kurohmaru, "A MPEG4 programmable CODEC DSP with an embedded pre/post-processing engine," in Proc. IEEE Custom Integr. Circuits Conf., 1999, pp. 69-72.
    • (1999) Proc. IEEE Custom Integr. Circuits Conf. , pp. 69-72
    • Kurohmaru, S.1
  • 25
    • 33746905954 scopus 로고    scopus 로고
    • Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems
    • P. G. Paulin, "Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems," in Proc. Des. Autom. Test Eur. (DATE), 2006, pp. 482-487.
    • (2006) Proc. Des. Autom. Test Eur. (DATE) , pp. 482-487
    • Paulin, P.G.1
  • 27
    • 84858930401 scopus 로고    scopus 로고
    • Recent advances in low power design and functional co-verification automation from the earliest system - Level design stages
    • T. Omnès, Y. Bouchebaba, C. Kulkarni, and F. Coelho, C. Piguet, Ed., Boca Raton, FL: CRC
    • T. Omnès, Y. Bouchebaba, C. Kulkarni, and F. Coelho, C. Piguet, Ed., "Recent advances in low power design and functional co-verification automation from the earliest system - Level design stages," in Low-Power Electronics Design. Boca Raton, FL: CRC, 2004.
    • (2004) Low-Power Electronics Design


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.