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Volumn 1, Issue , 2004, Pages 364-369

A system level exploration platform and methodology for network applications based on configurable processors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; CRYPTOGRAPHY; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; OPTIMIZATION; PROGRAM PROCESSORS; EXHIBITIONS; HARDWARE;

EID: 3042610030     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268874     Document Type: Conference Paper
Times cited : (12)

References (11)
  • 1
    • 0003703503 scopus 로고    scopus 로고
    • Master's Thesis, Dept. of Electrical Engineering and Computer Science, Univ. of California, Berkeley
    • Shah, N.; "Understanding Network Processors", Master's Thesis, Dept. of Electrical Engineering and Computer Science, Univ. of California, Berkeley. 2001.
    • (2001) Understanding Network Processors
    • Shah, N.1
  • 2
    • 0036857174 scopus 로고    scopus 로고
    • Developing architectural platforms: A disciplined approach
    • IEEE, Nov.-Dec.
    • Mihal, A. et al.; "Developing architectural platforms: a disciplined approach", Design & Test of Computers, IEEE , Volume: 19 Issue: 6 , Nov.-Dec. 2002, pp. 6-16.
    • (2002) Design & Test of Computers , vol.19 , Issue.6 , pp. 6-16
    • Mihal, A.1
  • 3
    • 0036859776 scopus 로고    scopus 로고
    • Multiprocessor SoC platforms: A component-based design approach
    • IEEE, Nov.-Dec.
    • Cesario, W.O. et al.; "Multiprocessor SoC platforms: a component-based design approach", Design & Test of Computers, IEEE, Volume: 19 Issue: 6, Nov.-Dec. 2002, pp. 52-63.
    • (2002) Design & Test of Computers , vol.19 , Issue.6 , pp. 52-63
    • Cesario, W.O.1
  • 4
    • 0036857007 scopus 로고    scopus 로고
    • StepNP: A system-level exploration platform for network processors
    • IEEE, Nov.-Dec.
    • Paulin, P.G.; Pilkington, C.; Bensoudane, E.; "StepNP: a system-level exploration platform for network processors", Design & Test of Computers, IEEE, Volume: 19 Issue: 6, Nov.-Dec. 2002, pp. 17-26.
    • (2002) Design & Test of Computers , vol.19 , Issue.6 , pp. 17-26
    • Paulin, P.G.1    Pilkington, C.2    Bensoudane, E.3
  • 5
    • 0033884908 scopus 로고    scopus 로고
    • Xtensa: A configurable and extensible processor
    • IEEE, March-April
    • Gonzalez, R.E.; "Xtensa: a configurable and extensible processor", Micro, IEEE, vol. 20 Issue: 2, March-April 2000, pp. 60-70.
    • (2000) Micro , vol.20 , Issue.2 , pp. 60-70
    • Gonzalez, R.E.1
  • 10
    • 0040291388 scopus 로고    scopus 로고
    • The click modular router
    • E. Kohler et al., "The Click Modular Router", ACMTrans. Computer Systems, vol. 18, no. 3, Aug. 2000, pp. 263-297.
    • (2000) ACM Trans. Computer Systems , vol.18 , Issue.3 , pp. 263-297
    • Kohler, E.1
  • 11
    • 0035687956 scopus 로고    scopus 로고
    • Fast IP routing lookup with configurable processor and compressed routing table
    • IEEE, Nov.
    • Ji, H.M.; Srinivasan, R.; "Fast IP routing lookup with configurable processor and compressed routing table", GLOBECOM, IEEE, vol 4, Nov. 2001, pp. 2373-2377
    • (2001) Globecom , vol.4 , pp. 2373-2377
    • Ji, H.M.1    Srinivasan, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.