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Volumn 36, Issue 8, 2003, Pages 54-62

Programmable stream processors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; DIGITAL ARITHMETIC; IMAGE COMPRESSION; MULTIMEDIA SYSTEMS; REQUIREMENTS ENGINEERING; SIGNAL PROCESSING; THREE DIMENSIONAL COMPUTER GRAPHICS; VLSI CIRCUITS;

EID: 0041562664     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/MC.2003.1220582     Document Type: Article
Times cited : (225)

References (8)
  • 1
    • 0036858569 scopus 로고    scopus 로고
    • The implementation of the itanium 2 microprocessor
    • Nov.
    • S.D. Naffziger et al., "The Implementation of the Itanium 2 Microprocessor," IEEE J. Solid-State Circuits, Nov. 2002, pp. 1448-1460.
    • (2002) IEEE J. Solid-State Circuits
    • Naffziger, S.D.1
  • 3
    • 0003994824 scopus 로고    scopus 로고
    • Concurrent VLSI Architecture Tech. Report 122, Computer Systems Laboratory, Stanford Univ., Stanford, Calif.
    • U.J. Kapasi et al., Stream Scheduling, Concurrent VLSI Architecture Tech. Report 122, Computer Systems Laboratory, Stanford Univ., Stanford, Calif., 2002.
    • (2002) Stream Scheduling
    • Kapasi, U.J.1
  • 4
    • 0032312385 scopus 로고    scopus 로고
    • A bandwidth-efficient architecture for media processing
    • IEEE CS Press
    • S. Rixner et al., "A Bandwidth-Efficient Architecture for Media Processing," Proc. 31st Ann. ACM/IEEE Int'l Symp. Microarchitecture, IEEE CS Press, 1998, pp. 3-13.
    • (1998) Proc. 31st Ann. ACM/IEEE Int'l Symp. Microarchitecture , pp. 3-13
    • Rixner, S.1
  • 5
    • 0035063033 scopus 로고    scopus 로고
    • A 0.18μm CMOS IA32 microprocessor with a 4-GHz integer execution unit
    • IEEE Standards Office
    • D. Sager et al., "A 0.18μm CMOS IA32 Microprocessor with a 4-GHz Integer Execution Unit," 2001 IEEE Int'l Solid-State Circuits Conf. Digest of Technical Papers, IEEE Standards Office, 2001, pp. 324-325.
    • (2001) 2001 IEEE Int'l Solid-State Circuits Conf. Digest of Technical Papers , pp. 324-325
    • Sager, D.1
  • 6
    • 0041534595 scopus 로고    scopus 로고
    • Texas Instruments; Datasheet SPRS186D, Dec.; rev. May 2003
    • Texas Instruments, TMS320C6713 Floating-Point Digital Signal Processor, Datasheet SPRS186D, Dec. 2001, rev. May 2003; http://focus.ti.com/lit/ds/symlink/tms320c6713.pdf
    • (2001) TMS320C6713 Floating-Point Digital Signal Processor
  • 8
    • 0010828897 scopus 로고    scopus 로고
    • white paper, Computer Systems Laboratory, Stanford Univ., Stanford, Calif.
    • W.J. Dally, P. Hanrahan, and R. Fedkiw, A Streaming Supercomputer, white paper, Computer Systems Laboratory, Stanford Univ., Stanford, Calif., 2001.
    • (2001) A Streaming Supercomputer
    • Dally, W.J.1    Hanrahan, P.2    Fedkiw, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.