-
1
-
-
0141717701
-
Closing the SoC design gap
-
Oct.
-
J. Henkel, "Closing the SoC Design Gap", IEEE Computer Magazine, Oct. 2003, pp. 119-121.
-
(2003)
IEEE Computer Magazine
, pp. 119-121
-
-
Henkel, J.1
-
7
-
-
0036645618
-
A heterogeneous multiprocessor architecture for flexible media processing
-
July
-
M. Rutten et al., "A Heterogeneous Multiprocessor Architecture for Flexible Media Processing", IEEE Design & Test of Computers, 19(4):39-50, July 2002.
-
(2002)
IEEE Design & Test of Computers
, vol.19
, Issue.4
, pp. 39-50
-
-
Rutten, M.1
-
8
-
-
0035444259
-
Viper: A multiprocessor SoC for advanced set-top box and digital TV systems
-
September
-
S. Dutta et al., "Viper: A Multiprocessor SoC for Advanced Set-Top Box and Digital TV Systems", IEEE Design & Test of Computers, 18(5):21-31, September 2001.
-
(2001)
IEEE Design & Test of Computers
, vol.18
, Issue.5
, pp. 21-31
-
-
Dutta, S.1
-
9
-
-
0034428118
-
System level design: Orthogonalization of concerns and platform-based design
-
December
-
K. Keutzer, S. Malik, R. Newton, J. Rabaey and A. Sangiovanni- Vincentelli, "System Level Design: Orthogonalization of Concerns and Platform-Based Design", IEEE Trans. on Computer-Aided Design, 19(12), December 2000.
-
(2000)
IEEE Trans. on Computer-Aided Design
, vol.19
, Issue.12
-
-
Keutzer, K.1
Malik, S.2
Newton, R.3
Rabaey, J.4
Sangiovanni-Vincentelli, A.5
-
10
-
-
3042666142
-
The mescal architecture development system (tipi) tutorial
-
UCB/ERLM03/40, Electronics Research Lab, University of California at Berkeley, October
-
M. Gries, S. Weber and C. Brooks, "The Mescal Architecture Development System (tipi) Tutorial", Technical Report, UCB/ERLM03/40, Electronics Research Lab, University of California at Berkeley, October 2003.
-
(2003)
Technical Report
-
-
Gries, M.1
Weber, S.2
Brooks, C.3
-
11
-
-
0034846659
-
Addressing the system-on-a-chip interconnect woes through communication based design
-
June
-
M. Sgroi, M. Sheets, A. Mihal, K. Keutzer, S. Malik, J. Rabaey and A. Sangiovanni-Vincentelli, "Addressing the System-on-a-Chip Interconnect Woes through Communication Based Design", Proc. of Design Automation Conf., pages 667-672, June 2001.
-
(2001)
Proc. of Design Automation Conf.
, pp. 667-672
-
-
Sgroi, M.1
Sheets, M.2
Mihal, A.3
Keutzer, K.4
Malik, S.5
Rabaey, J.6
Sangiovanni-Vincentelli, A.7
-
12
-
-
0037912292
-
System synthesis for multiprocessor embedded applications
-
March
-
L. Cairo, M. Kreutz, F. R. Wagner and M. Oyamada, "System Synthesis for Multiprocessor Embedded Applications", Proc. of Design Automation and Test in Europe, pages 697-702, March 2000.
-
(2000)
Proc. of Design Automation and Test in Europe
, pp. 697-702
-
-
Cairo, L.1
Kreutz, M.2
Wagner, F.R.3
Oyamada, M.4
-
13
-
-
0036857007
-
StepNP: A system-level exploration platform for network processors
-
Nov.
-
P. G. Paulin, C. Pilkington, E. Bensoudane, "StepNP: A System-Level Exploration Platform for Network Processors", IEEE Design & Test of Computers, vol. 19, no.6, Nov. 2002, pp. 17-26.
-
(2002)
IEEE Design & Test of Computers
, vol.19
, Issue.6
, pp. 17-26
-
-
Paulin, P.G.1
Pilkington, C.2
Bensoudane, E.3
-
15
-
-
3042610030
-
A system-level exploration platform and methodology for network applications based on configurable processors
-
Paris, Feb.
-
D. Quinn et al, "A System-level Exploration Platform and Methodology for Network Applications Based on Configurable Processors", Proc. of Design Automation and Test in Europe (DATE), Paris, Feb. 2004.
-
(2004)
Proc. of Design Automation and Test in Europe (DATE)
-
-
Quinn, D.1
-
17
-
-
3042585108
-
-
See ST web site: http://www.stmcu.com/inchtml-pages-STBus_intro.html
-
ST Web Site
-
-
-
18
-
-
84859967419
-
SPIN: A scalable, packet-Switched, on-chip micro-network
-
Munich, March
-
A. Greiner et al, "SPIN: a Scalable, Packet-switched, On-chip Micro-network, Proc. of Design Automation and Test in Europe (Designer Forum), Munich, March 2003.
-
(2003)
Proc. of Design Automation and Test in Europe (Designer Forum)
-
-
Greiner, A.1
-
19
-
-
0038645161
-
An 800MHz star-connected on-chip network for application to systems on a chip
-
San Francisco, Feb.
-
S.-J. Lee et al, "An 800MHz Star-Connected On-Chip Network for Application to Systems on a Chip", Proc. of Intl. Solid-State Circuits Conference (ISSC), San Francisco, Feb. 2003.
-
(2003)
Proc. of Intl. Solid-state Circuits Conference (ISSC)
-
-
Lee, S.-J.1
-
20
-
-
0042194657
-
A 0.1 sum, 1GOPS reconfigurable signal processing IC with embedded FPGA and 1.2GB/S, 3-port flash memory subsystem
-
San Francisco, Feb.
-
M. Borgatti et al, "A 0.1 Sum, 1GOPS Reconfigurable Signal Processing IC with embedded FPGA and 1.2GB/S, 3-Port Flash Memory Subsystem", Proc. of Intl. Solid-State Circuits Conference (ISSC), San Francisco, Feb. 2003.
-
(2003)
Proc. of Intl. Solid-state Circuits Conference (ISSC)
-
-
Borgatti, M.1
-
22
-
-
3042673341
-
A multi-processor SoC platform and tools for communications applications
-
CRC Press, to appear in May
-
P. G. Paulin, C. Pilkington, E. Bensoudane, M. Langevin, "A Multi-Processor SoC Platform and Tools for Communications Applications", in Embedded Systems Handbook, CRC Press, to appear in May 2004.
-
(2004)
Embedded Systems Handbook
-
-
Paulin, P.G.1
Pilkington, C.2
Bensoudane, E.3
Langevin, M.4
-
23
-
-
0040291388
-
The click modular router
-
Aug.
-
E. Kohler et al., "The Click Modular Router," ACM Trans. Computer Systems, vol. 18, no. 3, Aug. 2000, pp. 263-297.
-
(2000)
ACM Trans. Computer Systems
, vol.18
, Issue.3
, pp. 263-297
-
-
Kohler, E.1
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