Efficient exploration of bus-based system-on-chip architectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 7, 2006, Pages 681-692

  Kim, Sungchan ^b,c   Ha, Soonhoi ^a,b  

^a Seoul National University ^*

^b Seoul National University   (South Korea)

^c SAMSUNG Electronics   (South Korea)

Author keywords

Communication architecture; Design space exploration; Memory allocation; Multitask; Performance estimation

Indexed keywords

COMMUNICATION SYSTEMS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; ITERATIVE METHODS; MULTITASKING; STORAGE ALLOCATION (COMPUTER); TELECOMMUNICATION TRAFFIC; VIDEO RECORDING;

COMMUNICATION ARCHITECTURE; DESIGN SPACE EXPLORATION; MULTITASK; PERFORMANCE ESTIMATION;

MICROPROCESSOR CHIPS;

EID: 33746891935     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.878260     Document Type: Conference Paper

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