Decoupling of cold-carrier effects in hot-carrier reliability assessment of HfO2 gated nMOSFETs

IEEE Electron Device Letters

Volumn 27, Issue 8, 2006, Pages 662-664

  Park, Hokyung ^a,b   Choi, Rino ^c   Lee, Byoung Hun ^c   Song, Seung Chul ^c   Chang, Man ^a   Young, Chadwin D ^c   Bersuker, Gennadi ^c   Lee, Jack C ^b   Hwang, Hyunsang ^a  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

^b The University of Texas at Austin   (United States)

^c SEMATECH   (United States)

Author keywords

Channel hot carrier; Cold carrier trapping; Decoupling; Hafnium oxide

Indexed keywords

COUPLED CIRCUITS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); STRESSES;

CHANNEL HOT CARRIER; COLD-BARRIER TRAPPING; DECOUPLING; HAFNIUM OXIDE; HOT-CARRIER STRESSES;

MOSFET DEVICES;

EID: 33746562952     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2006.878041     Document Type: Article

References (13)

1. G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-κ gate dielectrics: Current status and materials properties considerations," J. Appl. Phys., vol. 89, no. 10, pp. 5243-5274, May 2001.
2. E. P. Gusev, A. Buchanan, E. Cartier, A. Kumar, D. DiMaria, S. Guha, A. Callegari, S. Zafar, P. C. Jamison, D. A. Neumayer, M. Copel, M. A. Gribelyuk, H. Okorn-Schmidt, C. D'Emic, P. Kozlowski, K. Chan, N. Bojarczuk, L.-A. Ragnarsson, P. Ronsheim, K. Rim, R. J. Fleming, A. Mocuta, and A. Ajmera, "Ultrathin high-κ gate stacks for advanced CMOS devices," in IEDM Tech. Dig., 2001, pp. 451-454.
3. 2 equivalent thickness," in IEDM Tech. Dig., 2001, pp. 137-140.
4. J. C. Lee, H. J. Cho, C. S. Kang, S. Rhee, Y. H. Kim, R. Choi, C. Y. Kang, C. Choi, and M. Abkar, "High-κ dielectrics and MOSFET characteristics," in IEDM Tech. Dig., 2003, pp. 95-98.
5. T. Iwamoto, T. Ogura, M. Terai, H. Watanabe, N. Ikarashi, M. Miyamura, T. Tatsumi, M. Saitoh, A. Morioka, K. Watanabe, Y. Saito, Y. Yabe, T. Ikarashi, K. Masuzaki, Y. Mochizuki, and T. Mogami, "A highly manufacturable low power and high speed HfSiO CMOS FET with dual Poly-Si gate electrodes," in IEDM Tech. Dig., 2003, pp. 639-642.
6. 2," in Proc. ESSDERC, 2005, pp. 367-370.
7. J. H. Sim, B. H. Lee, R. Choi, S. C. Song, and G. Bersuker, "Hot carrier degradation of HfSiON gate dielectrics with TiN electrode," IEEE Trans. Device Mater. Rel., vol. 5, no. 2, pp. 177-182, Jun. 2005.
8. B. H. Lee, R. Choi, J. Sim, S. Krishnan, J. Peterson, G. A. Brown, and G. Bersuker, "Validity of constant voltage stress based reliability assessment of high-κ devices," IEEE Trans. Device Mater. Rel., vol. 5, no. 1, pp. 20-25, Mar. 2005.
9. B. H. Lee, C. D. Young, R. Choi, J. H. Sim, G. Bersuker, C. Y. Kang, R. Harris, G. A. Brown, K. Matthews, S. C. Song, N. Moumen, J. Barnett, P. Lysaght, K. S. Choi, H. C. Wen, C. Huffman, H. Alshareef, P. Majhi, S. Gopalan, J. Peterson, P. Kirsh, H.-J. Li, J. Gutt, M. Gardner, H. R. Huff, P. Zeizoff, R. Murto, L. Larson, and C. Ramiller, "Intrinsic characteristics of Fast Transient Charging Effects (FCTE)," in IEDM Tech. Dig., 2004, pp. 859-862.
10. I. Hirano, T. Yamaguchi, K. Sekine, M. Takayanagi, K. Eguchi, Y. Sunashima, and H. Satake, "Significant role of cold carriers for dielectric breakdown in HfSiON," in VLSI Symp. Tech. Dig., 2004, pp. 142-143.
11. 3 field-effect transistors," J. Appl. Phys., vol. 94, no. 3, pp. 1728-1737, Aug. 2003.
12. M. Takayanagi, T.Wantanabe, R. Iijima, K. Ishimaru, and Y. Tsunashima, "Investigation of hot carrier effects in n-MISFETs with HfSiON gate dielectric," in Proc. Int. Reliab. Phys. Symp., 2004, pp. 13-14.
13. B. H. Lee, J. H. Sim, R. Choi, G. Bersuker, K. Matthew, N. Moumen, J. J. Peterson, and L. Larson, "Localized transient charging and it's implication on the hot carrier reliability of HfSiON MOSFETs," in Proc. Int. Reliab. Phys. Symp., 2004, pp. 691-692.