A bijection between permutations and floorplans, and its applications

Discrete Applied Mathematics

Volumn 154, Issue 12, 2006, Pages 1674-1684

  Ackerman, Eyal ^a   Barequet, Gill ^a   Pinter, Ron Y ^a  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

Author keywords

Baxter permutations; Mosaic floorplans; Separable permutations; Slicing floorplans

Indexed keywords

INTEGRATED CIRCUITS; LOGIC DESIGN; SET THEORY;

BAXTER PERMUTATIONS; MOSAIC FLOORPLANS; SEPARABLE PERMUTATIONS; SLICING FLOORPLANS;

COMBINATORIAL MATHEMATICS;

EID: 33646901979     PISSN: 0166218X     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.dam.2006.03.018     Document Type: Article

References (23)

1. Ackerman E., Barequet G., and Pinter R.Y. On the number of rectangular partitions. Proceedings of the 15th ACM-SIAM Symposium on Discrete Algorithms. New Orleans, LA (2004) 729-738
2. Avis D., and Newborn M. On pop-stacks in series. Util. Math. 19 (1981) 129-140
3. Baxter G. On fixed points of the composite of commuting functions. Proc. Amer. Math. Soc. 15 (1964) 851-855
4. Bose P., Buss J.F., and Lubiw A. Pattern matching for permutations. Inform. Process. Lett. 65 (1998) 277-283
5. Chung F.R.K., Graham R.L., Hoggatt V.E., and Kleiman M. The number of Baxter permutations. J. Combin. Theory, Ser. A 24 (1978) 382-394
6. Dulucq S., and Guibert O. Baxter permutations. Discrete Math. 180 (1998) 143-156
7. Hong X., Huang G., Cai Y., Gu J., Dong S., Cheng C.K., and Gu J. Corner block list. an effective and efficient topological representation of non-slicing floorplan. Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. San Jose, CA (2000) 8-12
8. Y. Kajitani, The single sequence that unifies placement and floorplanning, Presented at the First Conference for Asia Universities on Semiconductors Design, 2003.
9. Mallows C.L. Baxter permutations rise again. J. Combin. Theory, Ser. A 27 (1979) 394-396
10. Murata H., Fujiyoshi K., Nakatake S., and Kajitani Y. VLSI module placement based on rectangle-packing by the sequence-pair. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems 15 12 (1996) 1518-1524
11. Murata H., Fujiyoshi K., Watanabe T., and Kajitani Y. A mapping from sequence-pair to rectangular dissection. Proceedings of Asia and South Pacific Design Automation Conference. Chiba, Japan (1997) 625-633
12. Sakanushi K., Kajitani Y., and Mehta D.P. The quarter-state-sequence floorplan representation. IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications 50 3 (2003) 376-386
13. Shapiro L., and Stephens A.B. Bootstrap percolation, the Schröder numbers, and the N-Kings problem. SIAM J. Discrete Math. 4 (1991) 275-280
14. Shen Z.C., and Chu C.C.N. Bounds on the number of slicing, mosaic, and general floorplans. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems 22 10 (2003) 1354-1361
15. R.P. Stanley, Enumerative Combinatorics, vol. 2, Cambridge, 1999.
16. West J. Generating trees and the Catalan and Schröder numbers. Discrete Math. 146 (1995) 247-262
17. Yao B., Chen H., Cheng C.K., and Graham R.L. Floorplan representations: complexity and connections. ACM Transactions on Design Automation of Electronic Systems 8 1 (2003) 55-80
18. Young E.F.Y., Chu C.C.N., and Shen C. Twin binary sequences: a non-redundant representation for general non-slicing floorplan. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 22 4 (2003) 457-469
19. Zhang X., and Kajitani Y. Space-planning. placement of modules with controlled empty area by single-sequence. Proceedings of Asia and South Pacific Design Automation Conference. Yokohama, Japan (2004) 25-30
20. Zhang X., and Kajitani Y. A normalized configuration of floorplans and ABLR-relations. International Conference on Communications, Circuits and Systems. Chengdu, China (2004) 1218-1222
21. Zhang X., and Kajitani Y. Theory of T-junction floorplans in terms of single-sequence. IEEE International Symposium on Circuits and Systems. Vancouver, Canada (2004) 341-344
22. Zhu X., Zhuang C., and Kajitani Y. A general packing algorithm based on single-sequence. International Conference on Communications, Circuits and Systems. Chengdu, China (2004) 1257-1261
23. Zhuang C., Zhu X., Takashima Y., Nakatake S., and Kajitani Y. An algorithm for checking slicing floorplan based on HPG and its application. International Conference on Communications, Circuits and Systems. Chengdu, China (2004) 1223-1227