-
6
-
-
0034481271
-
Corner block list: Corner block list: An effective and efficient topological representation of nonslicing floorplan
-
X. Hong, G. Huang, Y. Cai, J. Gu, S. Dong, C. K. Cheng, and J. Gu, "Corner block list: Corner block list: An effective and efficient topological representation of nonslicing floorplan," in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 2000, pp. 8-12
-
Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 2000
, pp. 8-12
-
-
Hong, X.1
Huang, G.2
Cai, Y.3
Gu, J.4
Dong, S.5
Cheng, C.K.6
Gu, J.7
-
9
-
-
0003657590
-
-
Reading, MA: Addison-Wesley
-
D. E. Knuth, The Art of Computer Programming, Fundamental Algorithms, 2 ed. Reading, MA: Addison-Wesley, 1973, vol. 1.
-
(1973)
The Art of Computer Programming, Fundamental Algorithms, 2 Ed.
, vol.1
-
-
Knuth, D.E.1
-
10
-
-
0005497664
-
The quarter-state sequence (Q-sequence) to represent the floorplan and applications to layout optimization
-
K. Sakanushi and Y. Kajitani, "The quarter-state sequence (Q-sequence) to represent the floorplan and applications to layout optimization," in Proc. Asian Pacific Conf. Circuit Syst., 2000, pp. 829-832
-
Proc. Asian Pacific Conf. Circuit Syst., 2000
, pp. 829-832
-
-
Sakanushi, K.1
Kajitani, Y.2
-
11
-
-
0026175734
-
Branch-and-bound placement for building block layout
-
H. Onodera, Y. Taniquchi, and K. Tamaru, "Branch-and-bound placement for building block layout," in Proc. ACM/IEEE Design Automation Conf., 1991, pp. 433-439.
-
Proc. ACM/IEEE Design Automation Conf., 1991
, pp. 433-439
-
-
Onodera, H.1
Taniquchi, Y.2
Tamaru, K.3
-
12
-
-
0029488327
-
Rectangular-packing-based module placement
-
H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, "Rectangular-packing-based module placement," in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 1995, pp. 472-479.
-
Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 1995
, pp. 472-479
-
-
Murata, H.1
Fujiyoshi, K.2
Nakatake, S.3
Kajitani, Y.4
-
13
-
-
0030408582
-
Module placement on BSG-structure and IC laylot applications
-
S. Nakatake, K. Fujiyoshi, H. Murata, and Y. Kajitani, "Module placement on BSG-structure and IC laylot applications," in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 1996, pp. 484-491.
-
Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 1996
, pp. 484-491
-
-
Nakatake, S.1
Fujiyoshi, K.2
Murata, H.3
Kajitani, Y.4
-
14
-
-
0032690067
-
An O-tree representation of nonslicing floorplan and its application
-
P.-N. Guo, C.-K. Cheng, and T. Yoshimura, "An O-tree representation of nonslicing floorplan and its application," in Proc. ACM/IEEE Design Automation Conf., 1999, pp. 268-273.
-
Proc. ACM/IEEE Design Automation Conf., 1999
, pp. 268-273
-
-
Guo, P.-N.1
Cheng, C.-K.2
Yoshimura, T.3
-
15
-
-
0033701594
-
B *-trees: An new representation for nonslicing floorplans
-
Y. C. Chang, Y. W. Chang, G. M. Wu and S. W. Wu, "B *-trees: An new representation for nonslicing floorplans," in Proc. ACM/IEEE Design Automation Conf., 2000, pp. 458-463.
-
Proc. ACM/IEEE Design Automation Conf., 2000
, pp. 458-463
-
-
Chang, Y.C.1
Chang, Y.W.2
Wu, G.M.3
Wu, S.W.4
-
16
-
-
0034832422
-
ECBL: An extended corner block list with solution space including optimum placement
-
S. Zhou, S. Dong, X. Hong, Y. Cai, and C.-K. Cheng, "ECBL: An extended corner block list with solution space including optimum placement," in Proc. Int. Symp. Physical Design, 2001, pp. 156-161.
-
Proc. Int. Symp. Physical Design, 2001
, pp. 156-161
-
-
Zhou, S.1
Dong, S.2
Hong, X.3
Cai, Y.4
Cheng, C.-K.5
-
17
-
-
0344017702
-
An enhanced Q-sequence augmented with empty-room-insertion and parenthesis trees
-
C. Zhuang, K. Sakanushi, L. Jin, and Y. Kajitani, "An enhanced Q-sequence augmented with empty-room-insertion and parenthesis trees," in Proc. Conf. Design Automation and Test in Europe, 2002, pp. 61-68.
-
Proc. Conf. Design Automation and Test in Europe, 2002
, pp. 61-68
-
-
Zhuang, C.1
Sakanushi, K.2
Jin, L.3
Kajitani, Y.4
-
18
-
-
0036375926
-
Twin binary sequences: A nonredundant representation for general nonslicing floorplan
-
F. Y. Young, C. Chu, and Z. C. Shen, "Twin binary sequences: A nonredundant representation for general nonslicing floorplan," in Proc. Int. Symp. Physical Design, 2002, pp. 196-201.
-
Proc. Int. Symp. Physical Design, 2002
, pp. 196-201
-
-
Young, F.Y.1
Chu, C.2
Shen, Z.C.3
-
19
-
-
0034823712
-
Revisiting floorplan representations
-
B. Yao, H. Y. Chen, C.-K. Cheng, and R. Graham, "Revisiting floorplan representations," in Proc. Int. Symp. Physical Design, 2001, pp. 138-143.
-
Proc. Int. Symp. Physical Design, 2001
, pp. 138-143
-
-
Yao, B.1
Chen, H.Y.2
Cheng, C.-K.3
Graham, R.4
|