An algorithm for checking slicing floorplan based on HPG and its application

2004 International Conference on Communications, Circuits and Systems

Volumn 2, Issue , 2004, Pages 1223-1227

  Zhuang, Changwen ^a   Zhu, Xiaoke ^a   Takashima, Yasuhiro ^b   Nakatake, Shigetoshi ^b   Kajitani, Yoji ^b  

^a Jedat Innovation Inc   (Japan)

^b UNIVERSITY OF KITAKYUSHU   (Japan)

Author keywords

Floorplan; HPG; Placement; Slicing

Indexed keywords

FLOORPLAN ALGORITHMS; HAMILTON PATH-BASED GRAPH (HPG); PLACEMENT TOOLS; SLICING FLOORPLANS;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER WORKSTATIONS; GRAPH THEORY; HAMILTONIANS; PROBLEM SOLVING; SIMULATED ANNEALING; THEOREM PROVING;

INTEGRATED CIRCUIT LAYOUT;

EID: 11244325924     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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