A general packing algorithm based on single-sequence

2004 International Conference on Communications, Circuits and Systems

Volumn 2, Issue , 2004, Pages 1257-1261

  Zhu, Xiaoke ^a   Zhuang, Changwen ^a   Kajitani, Yoji ^b  

^a Jedat Innovation Inc   (Japan)

^b UNIVERSITY OF KITAKYUSHU   (Japan)

Author keywords

EDA; Packing Algorithm; Placement

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; SET THEORY; TOPOLOGY; VLSI CIRCUITS;

DIRECT RELATION SET (DRS); FLOORPLANNING; PACKING ALGORITHM; PLACEMENT;

INTEGRATED CIRCUIT LAYOUT;

EID: 11244331754     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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