Microarchitecture-based introspection: A technique for transient-fault tolerance in microprocessors

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2005, Pages 434-443

  Qureshi, Moinuddin K ^a   Mutlu, Onur ^a   Patt, Yale N ^a  

^a The University of Texas at Austin   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT TOLERANCE TECHNIQUES; LONG-LATENCY CACHE; MICROARCHITECTURE-BASED INTROSPECTION; MICROARCHITECTURES;

BANDWIDTH; BENCHMARKING; BUFFER STORAGE; COMPUTER HARDWARE; COSTS; FAULT TOLERANT COMPUTER SYSTEMS; REDUNDANCY; SECURITY OF DATA;

COMPUTER ARCHITECTURE;

EID: 27544488444     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2005.62     Document Type: Conference Paper

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