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Volumn , Issue , 2005, Pages 98-109

RENO: A rename-based instruction optimizer

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER SIMULATION; OPTIMIZATION; PROGRAM COMPILERS;

EID: 27544450708     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isca.2005.43     Document Type: Conference Paper
Times cited : (39)

References (27)
  • 1
    • 84944396166 scopus 로고    scopus 로고
    • Exploiting value locality in physical register files
    • Dec.
    • S. Balakrishnan and G. Sohi. Exploiting Value Locality in Physical Register Files. In MICRO-36, Dec. 2003.
    • (2003) MICRO-36
    • Balakrishnan, S.1    Sohi, G.2
  • 4
    • 21644444365 scopus 로고    scopus 로고
    • Dataflow MiniGraphs: Amplifying superscalar capacity and bandwidth
    • Dec.
    • A. Bracy, P. Prahlad, and A. Roth. Dataflow MiniGraphs: Amplifying Superscalar Capacity and Bandwidth. In MICRO-37, Dec. 2004.
    • (2004) MICRO-37
    • Bracy, A.1    Prahlad, P.2    Roth, A.3
  • 5
    • 0003465202 scopus 로고    scopus 로고
    • The SimpleScalar tool set, version 2.0
    • University of Wisconsin-Madison, Jun.
    • D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0. Technical Report CS-TR-97-1342, University of Wisconsin-Madison, Jun. 1997.
    • (1997) Technical Report , vol.CS-TR-97-1342
    • Burger, D.1    Austin, T.2
  • 6
    • 0036957408 scopus 로고    scopus 로고
    • Dynamic dead instruction detection and elimination
    • Oct.
    • J. Butts and G. Sohi. Dynamic Dead Instruction Detection and Elimination. In ASPLOS-X, Oct. 2002.
    • (2002) ASPLOS-X
    • Butts, J.1    Sohi, G.2
  • 7
    • 0031594025 scopus 로고    scopus 로고
    • Memory dependence prediction using store sets
    • Jun.
    • G. Chrysos and J. Emer. Memory Dependence Prediction using Store Sets. In ISCA-25, Jun. 1998.
    • (1998) ISCA-25
    • Chrysos, G.1    Emer, J.2
  • 9
    • 27544444357 scopus 로고    scopus 로고
    • Continuous optimization
    • University of Illinois, Aug.
    • B. Fahs, T. Rafacz, S. Patel, and S. Lumetta. Continuous Optimization. Technical Report UILU-ENG-04-2207, University of Illinois, Aug. 2004.
    • (2004) Technical Report , vol.UILU-ENG-04-2207
    • Fahs, B.1    Rafacz, T.2    Patel, S.3    Lumetta, S.4
  • 10
    • 27544512320 scopus 로고    scopus 로고
    • Using interaction costs for microarchitectural bottleneck analysis
    • Dec.
    • B. Fields, R. Bodik, M. Hill, and C. Newburn. Using Interaction Costs for Microarchitectural Bottleneck Analysis. In MICRO-36, Dec. 2003.
    • (2003) MICRO-36
    • Fields, B.1    Bodik, R.2    Hill, M.3    Newburn, C.4
  • 11
    • 0034844926 scopus 로고    scopus 로고
    • Focusing processor policies via critical path prediction
    • Jul.
    • B. Fields, S. Rubin, and R. Bodik. Focusing Processor Policies via Critical Path Prediction. In ISCA-27, Jul. 2001.
    • (2001) ISCA-27
    • Fields, B.1    Rubin, S.2    Bodik, R.3
  • 12
    • 3042606567 scopus 로고    scopus 로고
    • Using dynamic binary translation to fuse dependent instructions
    • Mar.
    • S. Hu and J. Smith. Using Dynamic Binary Translation to Fuse Dependent Instructions. In CGO-2, Mar. 2004.
    • (2004) CGO-2
    • Hu, S.1    Smith, J.2
  • 13
    • 0032315402 scopus 로고    scopus 로고
    • A novel renaming scheme to exploit value temporal locality through physical register reuse and unification
    • Dec.
    • S. Jourdan, R. Ronen, M. Bekerman, B. Shomar, and A. Yoaz. A Novel Renaming Scheme to Exploit Value Temporal Locality Through Physical Register Reuse and Unification. In MICRO-31, Dec. 1998.
    • (1998) MICRO-31
    • Jourdan, S.1    Ronen, R.2    Bekerman, M.3    Shomar, B.4    Yoaz, A.5
  • 14
    • 0036286947 scopus 로고    scopus 로고
    • Implementing optimizations at decode time
    • May
    • I. Kim and M. Lipasti. Implementing Optimizations at Decode Time. In ISCA-29, May 2002.
    • (2002) ISCA-29
    • Kim, I.1    Lipasti, M.2
  • 15
    • 84944411435 scopus 로고    scopus 로고
    • Macro-op scheduling: Relaxing scheduling loop constraints
    • Dec.
    • I. Kim and M. Lipasti. Macro-op Scheduling: Relaxing Scheduling Loop Constraints. In MICRO-36, Dec. 2003.
    • (2003) MICRO-36
    • Kim, I.1    Lipasti, M.2
  • 16
    • 0003272089 scopus 로고    scopus 로고
    • Media-bench: A tool for evaluating and synthesizing multimedia and communications systems
    • Dec.
    • C. Lee, M. Potkojnak, and W. Mangione-Smith. Media-Bench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems. In MICRO-30, Dec. 1997.
    • (1997) MICRO-30
    • Lee, C.1    Potkojnak, M.2    Mangione-Smith, W.3
  • 17
    • 84948992629 scopus 로고    scopus 로고
    • Cherry: Checkpointed early resource recycling in out-of-order microprocessors
    • Nov.
    • J. Martinez, J. Renau, M. Huang, M. Prvulovic, and J. Torrellas. Cherry: Checkpointed Early Resource Recycling in Out-of-Order Microprocessors. In MICRO-35, Nov. 2002.
    • (2002) MICRO-35
    • Martinez, J.1    Renau, J.2    Huang, M.3    Prvulovic, M.4    Torrellas, J.5
  • 19
    • 27544453565 scopus 로고    scopus 로고
    • Streamlining inter-operation communication via data dependence prediction
    • Dec.
    • A. Moshovos and G. Sohi. Streamlining Inter-Operation Communication via Data Dependence Prediction. In MICRO-30, Dec. 1997.
    • (1997) MICRO-30
    • Moshovos, A.1    Sohi, G.2
  • 20
    • 0034824934 scopus 로고    scopus 로고
    • Load and store reuse using register file contents
    • Jun.
    • S. Onder and R. Gupta. Load and Store Reuse using Register File Contents. In ICS-15, Jun. 2001.
    • (2001) ICS-15
    • Onder, S.1    Gupta, R.2
  • 21
    • 84948973777 scopus 로고    scopus 로고
    • Three extensions to register integration
    • Nov.
    • V. Petric, A. Bracy, and A. Roth. Three Extensions to Register Integration. In MICRO-35, Nov. 2002.
    • (2002) MICRO-35
    • Petric, V.1    Bracy, A.2    Roth, A.3
  • 22
    • 27544514377 scopus 로고    scopus 로고
    • Store Vulnerability Window (SVW): ReExecution filtering for enhanced load optimization
    • Jun.
    • A. Roth. Store Vulnerability Window (SVW): ReExecution Filtering for Enhanced Load Optimization. In ISCA-32, Jun. 2005.
    • (2005) ISCA-32
    • Roth, A.1
  • 23
    • 27544473043 scopus 로고    scopus 로고
    • Register integration: A simple and efficent implementation of squash re-use
    • Dec.
    • A. Roth and G. Sohi. Register Integration: A Simple and Efficent Implementation of Squash Re-Use. In MICRO-33, Dec. 2000.
    • (2000) MICRO-33
    • Roth, A.1    Sohi, G.2
  • 24
    • 3242744420 scopus 로고    scopus 로고
    • Squash reuse via a simplified implementation of register integration
    • A. Roth and G. Sohi. Squash Reuse via a Simplified Implementation of Register Integration. JILP, 4, 2002.
    • (2002) JILP , vol.4
    • Roth, A.1    Sohi, G.2
  • 25
    • 78149255691 scopus 로고    scopus 로고
    • Dynamic instruction reuse
    • Jun
    • A. Sudani and G. Sohi. Dynamic Instruction Reuse. In ISCA-24, Jun 1997.
    • (1997) ISCA-24
    • Sudani, A.1    Sohi, G.2
  • 26
    • 2642523834 scopus 로고    scopus 로고
    • Dynamically reducing pressure on the physical register file through simple register sharing
    • Mar.
    • L. Tran, N. Nelson, F. Ngai, S. Dropsho, and M. Huang. Dynamically Reducing Pressure on the Physical Register File through Simple Register Sharing. In ISPASS-2004, Mar. 2004.
    • (2004) ISPASS-2004
    • Tran, L.1    Nelson, N.2    Ngai, F.3    Dropsho, S.4    Huang, M.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.