An improved method for iDDT testing in the presence of leakage and process variation

Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004

Volumn , Issue , 2004, Pages 11-16

  Chehab, Ali ^a   Kayssi, Ayman ^a   Nazer, Anis ^a   Makki, Rafic ^b  

^a AMERICAN UNIVERSITY OF BEIRUT   (Lebanon)

^b UNITED ARAB EMIRATES UNIVERSITY   (United Arab Emirates)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; ELECTRIC RESISTANCE; LEAKAGE CURRENTS; MICROPROCESSOR CHIPS; NAND CIRCUITS; NETWORKS (CIRCUITS); SIGNAL PROCESSING; TRANSISTORS;

CURRENT-BASED TESTING; DYNAMIC CURRENT; TRANSIENT POWER SUPPLY; TRANSIENT SIGNAL ANALYSIS (TSA);

SEMICONDUCTOR DEVICE TESTING;

EID: 21444435473     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)

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