Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 6, 2005, Pages 849-860

  Ajami, Amir H ^a,b   Banerjee, Kaustav ^c   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

^b MAGMA DESIGN AUTOMATION   (United States)

^c University of California   (United States)

Author keywords

Clock skew; Elmore delay; Global interconnects; Hot spots; On chip temperature variations; Signal integrity; Substrate thermal gradient

Indexed keywords

ELECTROMIGRATION; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; SEMICONDUCTING SILICON; TEMPERATURE DISTRIBUTION;

CLOCK SKEW; ELMORE DELAY; GLOBAL INTERCONNECTS; HOT SPOTS; ON CHIP TEMPERATURE VARIATIONS; SIGNAL INTEGRITY; SUBSTRATE THERMAL GRADIENT;

ULSI CIRCUITS;

EID: 20444496778     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.847944     Document Type: Article

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