Optimal wire-sizing formula under the Elmore delay model

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 487-490

  Chen, Chung Ping ^a   Chen, Yao Ping ^a   Wong, D F ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; DIFFERENTIAL EQUATIONS; ELECTRIC NETWORK PARAMETERS; ELECTRIC VARIABLES CONTROL; ELECTRIC WIRING; ITERATIVE METHODS; MATHEMATICAL MODELS; OPTIMIZATION; TREES (MATHEMATICS); VLSI CIRCUITS;

ELMORE DELAY MODEL; NONUNIFORM WIRE SIZING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0029698051     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240611     Document Type: Conference Paper

References (7)