Manipulation of periodic Coulomb blockade oscillations in ultra-scaled memories by single electron charging of silicon nanocrystal floating gates

IEEE Transactions on Nanotechnology

Volumn 4, Issue 3, 2005, Pages 374-379

  Molas, Gabriel ^a   Jehl, Xavier ^b   Sanquer, Marc ^b   De Salvo, Barbara ^a   Lafond, Dominique ^a   Deleonibus, Simon ^a  

^a Laboratory of Electronics Technology and Instrumentation   (France)

^b Service des Matériaux et Microstructures Grenoble   (France)

Author keywords

Cryogenic electronics; Electron beam lithography; Quantum dots; Resonant tunneling (RT) devices; Semiconductor memories; Silicon on insulator (SOI) technology

Indexed keywords

COULOMB BLOCKADE; CRYOGENICS; ELECTRIC CHARGE; ELECTRON BEAM LITHOGRAPHY; ELECTRONS; LOGIC GATES; NANOSTRUCTURED MATERIALS; OSCILLATIONS; SEMICONDUCTOR QUANTUM DOTS; SILICON;

CRYOGENIC TREATMENT; LOW POWER; RESONANT TUNNELING (RT) DEVICES; SEMICONDUCTOR MEMORIES;

DATA STORAGE EQUIPMENT;

EID: 20344401329     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2005.846898     Document Type: Conference Paper

References (16)

1. J. R. Tucker, "Complementary digital logic based on the Coulomb blockade," J. Appl. Phys., vol. 72, no. 9, pp. 4399-4416, 1992.
2. L. Zhuang, L. Guo, and S. Y. Chou, "Silicon single-electron quantum dot transistor switch operating at room temperature," Appl. Phys. Lett., vol. 72, no. 10, pp. 1205-1207, 1998.
3. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, "Programmable single-electron transistor logic for future low-power intelligent LSI: Proposal and room-temperature operation," IEEE Trans. Electron Devices, vol. 50, no. 7, pp. 1623-1630, Jul. 2003.
4. Y. T. Tan, T. Kamiya, Z. A. K. Durrani, and H. Ahmed, "Room temperature nanocrystalline silicon single-electron transistors," J. Appl. Phys., vol. 94, no. 1, pp. 633-637, 2003.
5. M. Saitoh, T. Murakami, and T. Hiramoto, "Large Coulomb blockade oscillations at room temperature in ultranarrow wire channel MOSFETs formed by slight oxidation process," IEEE Trans. Nanotechnol., vol. 2, no. 4, pp. 241-245, Dec. 2003.
6. M. H. Devoret and R. J. Schoelkopf, "Amplifying quantum signals with the single-electron transistor," Nature, vol. 406, pp. 1039-1046, 2000.
7. K. Nishiguchi and S. Oda, "Self-aligned double-gate single-electron transistor derived from 0.12-μm-scale electron-beam lithography," Appl. Phys. Lett., vol. 78, no. 14, pp. 2070-2072, 2001.
8. N. Takahashi, H. Ishikuro, and T. Hiramoto, "Control of Coulomb blockade oscillations in silicon single electron transistors using silicon nanocrystal floating gates," Appl. Phys. Let., vol. 76, no. 2, pp. 209-211, 2000.
9. A. Nakajima, T. Futatsugi, K. Kosemura, T. Fukano, and N. Yokoyama, "Si single electron tunnelling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process," Appl. Phys. Lett., vol. 71, no. 3, pp. 353-355, 1997.
10. Y. Ono, Y. Takahashi, K. Yamazaki, M. Nagase, H. Namatsu, K. Kurihara, and K. Murase, "Fabrication method for IC-oriented Si single-electron transistors," IEEE Trans. Electron Devices, vol. 47, no. 1, pp. 147-153, Mar. 2000.
11. F. Stern, "Evidence for a mobility edge in inversion layers," Phys, Rev., vol. 9, no. 6, pp. 2762-2765, 1974.
12. X. Jehl, M. Sanquer, G. Bertand, G. Guegan, S. Deleonibus, and D. Fraboulet, "Silicon single electron transistors with SOI and MOSFET structures: The role of access resistances," IEEE Trans. Nanotechnol., vol. 2, no. 4, pp. 308-313, Dec. 2003.
13. G. Molas, B. De Salvo, G. Ghibaudo, D. Mariolle, A. Toffoli, N. Buffet, R. Puglisi, S. Lombardo, and S. Deleonibus, "Single electron effects and structural effects in ultrascaled silicon nanocrystal floating-gate memories," IEEE Trans. Nanotechnol., vol. 3, no. 1, pp. 42-48, Mar. 2004.
14. C. W. J. Beenakker, "Theory of Coulomb-blockade oscillations in the conductance of a quantum dot," Phys. Rev., vol. B 44, no. 4, pp. 1646-1656, 1991.
15. F. Boeuf, X. Jehl, M. Sanquer, and T. Skotnicki, "Controlled single-electron effects in nonoverlapped ultra-short silicon field effect transistors," IEEE Trans. Nanotechnol., vol. 2, no. 3, pp. 144-148, Sep. 2003.
16. V. A. Krupenin, A. B. Zorin, M. N. Savvateev, D. E. Presnov, and J. Niemeyer, "Single-electron transistor with metallic microstrips instead of tunnel junctions," J. Appl. Phys., vol. 90, no. 5, pp. 2411-2415, 2001.