Fabrication method for IC-oriented Si single-electron transistors

IEEE Transactions on Electron Devices

Volumn 47, Issue 1, 2000, Pages 147-153

  Ono, Yukinori ^a   Takahashi, Yasuo ^a   Yamazaki, Kenji ^a   Nagase, Masao ^a   Namatsu, Hideo ^a   Kurihara, Kenji ^a   Murase, Katsumi ^a  

^a NTT Basic Research Laboratories   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON TUNNELING; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; INTEGRATING CIRCUITS; LOGIC CIRCUITS; LSI CIRCUITS; NANOTECHNOLOGY; OXIDATION; SEMICONDUCTOR QUANTUM DOTS; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES;

QUANTUM EFFECT SEMICONDUCTOR DEVICES; SINGLE ELECTRON TRANSISTORS; VERTICAL PATTERN DEPENDENT OXIDATION;

MOSFET DEVICES;

EID: 0033896612     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.817580     Document Type: Article

References (13)