Room temperature nanocrystalline silicon single-electron transistors

Journal of Applied Physics

Volumn 94, Issue 1, 2003, Pages 633-637

  Tan, Y T ^b   Kamiya, T ^a   Durrani, Z A K ^b   Ahmed, H ^b  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b NONE

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; ELECTRODES; GRAIN BOUNDARIES; NANOSTRUCTURED MATERIALS; OXIDATION; POINT CONTACTS; POTENTIAL ENERGY; SILICON; THIN FILMS;

TUNNEL BARRIERS;

TRANSISTORS;

EID: 0042341673     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1569994     Document Type: Article

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