-
1
-
-
0033116184
-
Single-electron devices and their applications
-
Apr.
-
K. K. Likharev, "Single-electron devices and their applications," Proc. IEEE, vol. 87, pp. 606-632, Apr. 1999.
-
(1999)
Proc. IEEE
, vol.87
, pp. 606-632
-
-
Likharev, K.K.1
-
2
-
-
0000740684
-
Fabrication and characterization of room temperature silicon single electron memory
-
L. Guo, E. Leobandung, L. Zhuang, and S. Y. Chou, "Fabrication and characterization of room temperature silicon single electron memory," J. Vac. Sci. Technol. B, vol. 15, no. 6, pp. 2840-2843, 1997.
-
(1997)
J. Vac. Sci. Technol. B
, vol.15
, Issue.6
, pp. 2840-2843
-
-
Guo, L.1
Leobandung, E.2
Zhuang, L.3
Chou, S.Y.4
-
3
-
-
0001551483
-
Room temperature operation of Si single-electron memory with self-aligned floating dot gate
-
A. Nakajima, T. Futatsugi, K. Kosemura, T. Fukano, and N. Yokoyama, "Room temperature operation of Si single-electron memory with self-aligned floating dot gate," Appl. Phys. Lett., vol. 70, no. 13, pp. 1742-1744, 1997.
-
(1997)
Appl. Phys. Lett.
, vol.70
, Issue.13
, pp. 1742-1744
-
-
Nakajima, A.1
Futatsugi, T.2
Kosemura, K.3
Fukano, T.4
Yokoyama, N.5
-
4
-
-
0035894207
-
Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory
-
B. J. Hinds, T. Yamanaka, and S. Oda, "Emission lifetime of polarizable charge stored in nano-crystalline Si based single-electron memory," J. Appl. Phys., vol. 90, no. 12, pp. 6402-6408, 2001.
-
(2001)
J. Appl. Phys.
, vol.90
, Issue.12
, pp. 6402-6408
-
-
Hinds, B.J.1
Yamanaka, T.2
Oda, S.3
-
5
-
-
0037451308
-
Large memory window and long charge retention time in ultranarrow-channel silicon floating dot memory
-
M. Saitoh, E. Nagata, and T. Hiramoto, "Large memory window and long charge retention time in ultranarrow-channel silicon floating dot memory," Appl. Phys. Let., vol. 82, no. 11, pp. 1787-1789, 2003.
-
(2003)
Appl. Phys. Let.
, vol.82
, Issue.11
, pp. 1787-1789
-
-
Saitoh, M.1
Nagata, E.2
Hiramoto, T.3
-
6
-
-
0035424934
-
Experimental and theoretical investigation of nano-crystal and nitride-trap memory devices
-
B. De Salvo, G. Ghibaudo, G. Pananakakis, P. Masson, T. Baron, N. Buffet, A. Fernandes, and B. Guillaumot, "Experimental and theoretical investigation of nano-crystal and nitride-trap memory devices," IEEE Trans. Electron Dev., vol. 48, pp. 1789-1799, 2001.
-
(2001)
IEEE Trans. Electron Dev.
, vol.48
, pp. 1789-1799
-
-
De Salvo, B.1
Ghibaudo, G.2
Pananakakis, G.3
Masson, P.4
Baron, T.5
Buffet, N.6
Fernandes, A.7
Guillaumot, B.8
-
7
-
-
0026220651
-
Modeling of conductance fluctuations in small area metal-oxide- semiconductor transistors
-
G. Ghibaudo, O. Roux, and J. Brini, "Modeling of conductance fluctuations in small area metal-oxide-semiconductor transistors," Phys. Solid Slate, vol. 127, 281, pp. 281-294, 1991.
-
(1991)
Phys. Solid Slate
, vol.127
, Issue.281
, pp. 281-294
-
-
Ghibaudo, G.1
Roux, O.2
Brini, J.3
-
8
-
-
0028514569
-
Room-temperature single-electron memory
-
Sept.
-
K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, "Room-temperature single-electron memory," IEEE Trans. Electron Dev., vol. 41, pp. 1628-1638, Sept. 1994.
-
(1994)
IEEE Trans. Electron Dev.
, vol.41
, pp. 1628-1638
-
-
Yano, K.1
Ishii, T.2
Hashimoto, T.3
Kobayashi, T.4
Murai, F.5
Seki, K.6
-
9
-
-
0012278046
-
Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise
-
M. Kirton and M. J. Uren, "Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise," Adv. Phys., vol. 38, no. 4, pp. 367-468, 1989.
-
(1989)
Adv. Phys.
, vol.38
, Issue.4
, pp. 367-468
-
-
Kirton, M.1
Uren, M.J.2
-
10
-
-
0037112988
-
Three-dimensional self-consistent simulation of the charging time response in silicon nanocrystal flash memories
-
J. S. de Souza, A. V. Thean, J. P. Leburton, and V. N. Freire, "Three-dimensional self-consistent simulation of the charging time response in silicon nanocrystal flash memories," J. Appl. Phys., vol. 92, no. 10, pp. 6182-6187, 2002.
-
(2002)
J. Appl. Phys.
, vol.92
, Issue.10
, pp. 6182-6187
-
-
De Souza, J.S.1
Thean, A.V.2
Leburton, J.P.3
Freire, V.N.4
-
11
-
-
0033311566
-
Write, erase and storage times in nanocrystal memories and the role of interface states
-
J. A. Wahl, H. Silva, A. Gokimark, A. Kumar, J. J. Welser, and S. Tiwari, "Write, erase and storage times in nanocrystal memories and the role of interface states," in IEEE Int. Electron Devices Meeting Tech. Dig., vol. 99, 1999, p. 375.
-
(1999)
IEEE Int. Electron Devices Meeting Tech. Dig.
, vol.99
, pp. 375
-
-
Wahl, J.A.1
Silva, H.2
Gokimark, A.3
Kumar, A.4
Welser, J.J.5
Tiwari, S.6
-
12
-
-
2342658145
-
Modeling of the programming window distribution in multinanocrystals memories
-
Dec.
-
L. Perniola, B. De Salvo, G. Ghibaudo, A. F. Para, G. Pananakakis, V. Vidai, T. Baron, and S. Lombarde, "Modeling of the programming window distribution in multinanocrystals memories," IEEE Trans. Nanotechnol, vol. 2, pp. 277-284, Dec. 2003.
-
(2003)
IEEE Trans. Nanotechnol
, vol.2
, pp. 277-284
-
-
Perniola, L.1
De Salvo, B.2
Ghibaudo, G.3
Para, A.F.4
Pananakakis, G.5
Vidai, V.6
Baron, T.7
Lombarde, S.8
|