An SOC test integration platform and its industrial realization

Proceedings - International Test Conference

Volumn , Issue , 2004, Pages 1213-1222

  Cheng, Kuo Liang ^a   Huang, Jing Reng ^a   Wang, Chih Wea ^a   Lo, Chih Yen ^a   Denq, Li Ming ^a   Huang, Chih Tsun ^a   Wu, Cheng Wen ^a   Hung, Shin Wei ^b   Lee, Jye Yuan ^b  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b Global Unichip   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER WORKSTATIONS; CONSTRAINT THEORY; DATA PROCESSING; ELECTRONIC EQUIPMENT TESTING; ENCODING (SYMBOLS); MATHEMATICAL MODELS; RANDOM ACCESS STORAGE; SCHEDULING;

CORE TEST LANGUAGE (CTL); STANDARD TEST INTERFACE LANGUAGE (STIL); SYSTEM-ON-CHIPS (SOC); TEST ACCESS MECHANISMS (TAM);

INTEGRATED CIRCUIT LAYOUT;

EID: 18144379215     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

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