Realisation of multiple-valued functions using the capacitive threshold Iogic gate

IEE Proceedings: Computers and Digital Techniques

Volumn 151, Issue 6, 2004, Pages 435-447

  Schmid, A ^a   Leblebici, Y ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; LOGIC DESIGN; LOGIC GATES; THRESHOLD LOGIC; TRANSFER FUNCTIONS;

CAPACITIVE THRESHOLD LOGIC; TRANSFER FUNCTION SYNTHESIS;

MANY VALUED LOGICS;

EID: 11244293616     PISSN: 13502387     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1049/ip-cdt:20041099     Document Type: Article

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