Modular realization of threshold logic gates for high-performance digital signal processing applications

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 1998, Pages 281-285

  Leblebici, Yusuf ^a   Gurkaynak, Frank Nagan ^a  

^a WORCESTER POLYTECHNIC INSTITUTE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUIT LAYOUT; THRESHOLD LOGIC;

CAPACITIVE THRESHOLD LOGIC (CTL) GATES;

LOGIC GATES;

EID: 0031628743     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)