Application of Neuron-MOS to current-mode multi-valued logic circuits

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 1998, Pages 128-133

  Shen, Jing ^a   Tanno, Koichi ^a   Ishizuka, Okihiko ^a   Tang, Zheng ^a  

^a UNIVERSITY OF MIYAZAKI   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COMPUTER SOFTWARE; DETECTOR CIRCUITS; MOS DEVICES; NEURAL NETWORKS; THRESHOLD ELEMENTS;

CURRENT MODE MULTIVALUED LOGIC (MVL) CIRCUITS; SOFTWARE PACKAGE HSPICE;

LOGIC CIRCUITS;

EID: 0031636750     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)