Realization of NMAX and NMIN functions with multi-valued voltage comparators

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 2001, Pages 27-32

  Inaba, M ^a   Tanno, K ^a   Ishizuka, O ^a  

^a UNIVERSITY OF MIYAZAKI   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; FORMAL LOGIC; LOGIC CIRCUITS; LOGIC GATES; LSI CIRCUITS; MOS DEVICES; TRANSFER FUNCTIONS;

LOGIC FUNCTIONS;

COMPARATOR CIRCUITS;

EID: 0034822259     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Voltage-mode variable threshold circuits with neuron MOS transistors for multi-valued logic
2. Down literal circuit with neuron-MOS transistors and its applications
3. Multi-valued logic pass gate network using neuron-MOS transistors
4. Functional MOS transistor featuring gate-level weighted sum and threshold operation