A true single-phase energy-recovery multiplier

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 11, Issue 2, 2003, Pages 194-207

  Kim, Suhwan ^a,b   Ziesler, Conrad H ^a   Papaefthymiou, Marios C ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Adiabatic design; Arithmetic circuits; Charge recovery; Dynamic circuits; LC tank circuits; Low energy circuits; Low power circuits; Very large scale integration (VLSI) design

Indexed keywords

BUILT-IN SELF TEST; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; FIELD EFFECT TRANSISTORS;

POWER CLOCKS;

VLSI CIRCUITS;

EID: 0041767585     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.810795     Document Type: Article

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