Two phase non-overlapping clock adiabatic differential cascode voltage switch logic (ADCVSL)

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 364-365

  Suvakovic, D ^a   Salama, C ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL METHODS; ENERGY EFFICIENCY; ENERGY UTILIZATION; LOGIC CIRCUITS; POWER SUPPLY CIRCUITS;

ADIABATIC DIFFERENTIAL CASCODE VOLTAGE SWITCH LOGIC (ADCVSL);

DIGITAL INTEGRATED CIRCUITS;

EID: 0034428196     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. A review of adiabatic computing
2. A resonant signal driver for two-phase, almost-non-overlapping clocks
3. Differential current switch logic: A low power DCVS logic family