True single-phase energy-recovering logic for low-power, high-speed VLSI

Proceedings of the International Symposium on Low Power Design

Volumn , Issue , 1998, Pages 167-172

  Kim, Suhwan ^a   Papaefthymiou, Marios C ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; COMPUTER SIMULATION; ELECTRIC LOSSES; ELECTRIC POWER SUPPLIES TO APPARATUS; LOGIC DESIGN; LOGIC GATES; VLSI CIRCUITS;

HSPICE SIMULATIONS; SINGLE PHASE CLOCKING SCHEME; TRUE SINGLE PHASE ENERGY RECOVERING LOGIC;

LOGIC CIRCUITS;

EID: 0031632011     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/280756.280879     Document Type: Conference Paper

References (17)