An ultrathin vertical channel MOSFET for sub-100-nm applications

IEEE Transactions on Electron Devices

Volumn 50, Issue 5, 2003, Pages 1322-1327

  Liu, Haitao ^a   Xiong, Zhibin ^a   Sin, Johnny K O ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Asymmetric LDD; Solid phase epitaxy; Ultrathin channel; Vertical MOSFET

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; ELECTRON MOBILITY; EPITAXIAL GROWTH; GATES (TRANSISTOR); LEAKAGE CURRENTS; SEMICONDUCTING BORON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

ASYMMETRIC LOW DOPED DRAIN; SEMICONDUCTING SILICON GERMANIDE; SOLID PHASE EPITAXY; ULTRATHIN VERTICAL CHANNEL;

MOSFET DEVICES;

EID: 0041672285     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.813243     Document Type: Article

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