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Volumn 24, Issue 2, 2003, Pages 84-86

A novel ultrathin vertical channel NMOSFET with asymmetric fully overlapped LDD

Author keywords

Lightly doped drain (LDD); Solid phase epitaxy; Ultrathin channel; Vertical transistor

Indexed keywords

POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

EID: 0038732575     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2002.808153     Document Type: Article
Times cited : (3)

References (8)
  • 3
    • 0032637934 scopus 로고    scopus 로고
    • 25 nm p-channel vertical MOSFETs with SiGeC source-drain
    • June
    • M. Yang, C. L. Chang, M. Carroll, and J. C. Sturm, "25 nm p-channel vertical MOSFETs with SiGeC source-drain," IEEE Electron Device Lett., vol. 20, pp. 301-303, June 1999.
    • (1999) IEEE Electron Device Lett. , vol.20 , pp. 301-303
    • Yang, M.1    Chang, C.L.2    Carroll, M.3    Sturm, J.C.4
  • 6
    • 0036504081 scopus 로고    scopus 로고
    • A novel 3-D BiCMOS technology using selective epitaxial growth and lateral solid-phase epitaxy
    • Mar.
    • H. Liu, M. Kumar, and J. K. O. Sin, "A novel 3-D BiCMOS technology using selective epitaxial growth and lateral solid-phase epitaxy," IEEE Electron Device Lett., vol. 23, pp. 151-153, Mar. 2002.
    • (2002) IEEE Electron Device Lett. , vol.23 , pp. 151-153
    • Liu, H.1    Kumar, M.2    Sin, J.K.O.3
  • 7
    • 0028374842 scopus 로고
    • Electrical properties of heavily doped polycrystalline silicon germanium films
    • Feb.
    • T. J. King, J. P. McVittie, and K. C. Saraswat, "Electrical properties of heavily doped polycrystalline silicon germanium films," IEEE Trans. Electron Devices, vol. 41, pp. 228-231, Feb. 1994.
    • (1994) IEEE Trans. Electron Devices , vol.41 , pp. 228-231
    • King, T.J.1    McVittie, J.P.2    Saraswat, K.C.3
  • 8
    • 0033098648 scopus 로고    scopus 로고
    • Performance and reliability comparison between asymmetric and symmetric LDD devices and logic
    • Mar.
    • J. F. Chen, J. Tao, P. Fang, and C. Hu, "Performance and reliability comparison between asymmetric and symmetric LDD devices and logic," IEEE J. Solid-State Circuits, vol. 34, pp. 367-370, Mar. 1999.
    • (1999) IEEE J. Solid-State Circuits , vol.34 , pp. 367-370
    • Chen, J.F.1    Tao, J.2    Fang, P.3    Hu, C.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.