Substrate-triggered ESD protection circuit without extra process modification

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 2, 2003, Pages 295-302

  Ker, Ming Dou ^a   Chen, Tung Yang ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

Electrostatic discharge (ESD); ESD protection circuits; Gate coupled technique; Substrate triggered technique

Indexed keywords

ELECTRIC DISCHARGES; ELECTRIC POTENTIAL; HETEROJUNCTION BIPOLAR TRANSISTORS; MOSFET DEVICES; ROBUSTNESS (CONTROL SYSTEMS);

ELECTROSTATIC DISCHARGES (ESD);

CMOS INTEGRATED CIRCUITS;

EID: 0037322751     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.807168     Document Type: Article

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