On-chip inductance cons and pros

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 10, Issue 6, 2002, Pages 685-694

  Ismail, Yehea I ^a  

^a NORTHWESTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; INDUCTANCE; MICROPROCESSOR CHIPS; SPURIOUS SIGNAL NOISE;

SIGNAL RISE TIME;

CMOS INTEGRATED CIRCUITS;

EID: 0037004230     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2002.808445     Document Type: Review

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