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Volumn 33, Issue 3, 2002, Pages 263-287

Analog VLSI implementation of artificial neural networks with supervised on-chip learning

Author keywords

Analog VLSI neural networks; On chip learning; Supervised learning

Indexed keywords

BACKPROPAGATION; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; LEARNING ALGORITHMS; LINEAR INTEGRATED CIRCUITS; NEURAL NETWORKS; PERTURBATION TECHNIQUES; POWER INTEGRATED CIRCUITS; RELIABILITY;

EID: 0036891804     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1020717929709     Document Type: Article
Times cited : (44)

References (126)
  • 4
    • 0003415396 scopus 로고    scopus 로고
    • Cauwenberghs, G. and Bayoumi, M. (eds.); Kluwer Academic Publishers
    • Cauwenberghs, G. and Bayoumi, M. (eds.), Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems
  • 5
    • 0023331258 scopus 로고
    • An introduction to computing with neural nets
    • Lippmann, R. P., "An introduction to computing with neural nets." IEEE ASSP Magazine 4(2), pp. 4-22, 1987.
    • (1987) IEEE ASSP Magazine , vol.4 , Issue.2 , pp. 4-22
    • Lippmann, R.P.1
  • 8
    • 0026108209 scopus 로고
    • Silicon implementations of neural networks
    • February
    • Murray, A. F., "Silicon implementations of neural networks," in IEE Proceedings-F 138(1), February 1991.
    • (1991) IEE Proceedings-F , vol.138 , Issue.1
    • Murray, A.F.1
  • 11
    • 0022504321 scopus 로고
    • Computing with neural circuits: A model
    • 8 August
    • Hopfield, J. J. and Tank, D. W., "Computing with neural circuits: A model." Science 233, pp. 625-633, 8 August 1986.
    • (1986) Science , vol.233 , pp. 625-633
    • Hopfield, J.J.1    Tank, D.W.2
  • 12
    • 0023454091 scopus 로고
    • Analog circuits for variable synapse electronic neural networks
    • Tsividis, Y. and Satyanarayana, S., "Analog circuits for variable synapse electronic neural networks." Electronic Letters 2(24), pp. 1313-1314, 1987.
    • (1987) Electronic Letters , vol.2 , Issue.24 , pp. 1313-1314
    • Tsividis, Y.1    Satyanarayana, S.2
  • 14
    • 0025660615 scopus 로고
    • Future of the analog in the VLSI environment
    • Vittoz, E. A., "Future of the analog in the VLSI environment," in Proc. of ISCAS 1990, pp. 1372-1375, 1990.
    • (1990) Proc. of ISCAS 1990 , pp. 1372-1375
    • Vittoz, E.A.1
  • 15
    • 0034136215 scopus 로고    scopus 로고
    • Neural networks in analog hardware-Design and implementation issues
    • Draghici, S., "Neural networks in analog hardware-design and implementation issues." Int. Journal of Neural Systems 10(3), 2000.
    • (2000) Int. Journal of Neural Systems , vol.10 , Issue.3
    • Draghici, S.1
  • 16
    • 0025507283 scopus 로고
    • Neuromorphic electronic systems
    • October
    • Mead, C., "Neuromorphic electronic systems," in Proceedings of the IEEE 78(10), October 1990.
    • (1990) Proceedings of the IEEE , vol.78 , Issue.10
    • Mead, C.1
  • 17
    • 0032185581 scopus 로고    scopus 로고
    • Analog versus digital: Extrapolating from electronics to neurobiology
    • Sarpeshkar, R., "Analog versus digital: Extrapolating from electronics to neurobiology." Neural Computation 10, pp. 1601-1638, 1998.
    • (1998) Neural Computation , vol.10 , pp. 1601-1638
    • Sarpeshkar, R.1
  • 18
    • 0035505588 scopus 로고    scopus 로고
    • A neuromorphic VLSI device for implementing 2-D selective attention systems
    • November
    • Indiveri, G., "A neuromorphic VLSI device for implementing 2-D selective attention systems." IEEE Trans. on Neural Networks 12(6), pp. 1455-1463, November 2001.
    • (2001) IEEE Trans. on Neural Networks , vol.12 , Issue.6 , pp. 1455-1463
    • Indiveri, G.1
  • 19
    • 0036470152 scopus 로고    scopus 로고
    • Present and future industrial applications of bio-inspired VLSI systems
    • Vittoz, E., "Present and future industrial applications of bio-inspired VLSI systems." Analog Integrated Systems and Signal Processing 30, pp. 173-184, 2002.
    • (2002) Analog Integrated Systems and Signal Processing , vol.30 , pp. 173-184
    • Vittoz, E.1
  • 20
    • 0026428014 scopus 로고
    • A silicon neuron
    • December
    • Mahowald, M. and Douglas, R., "A silicon neuron." Nature 354, pp. 19-26, December 1991.
    • (1991) Nature , vol.354 , pp. 19-26
    • Mahowald, M.1    Douglas, R.2
  • 21
    • 0026428015 scopus 로고
    • Electronic arts imitate life
    • December
    • Andreou, A. G., "Electronic arts imitate life." Nature 354, 19/26, December 1991.
    • (1991) Nature , vol.354 , Issue.19-26
    • Andreou, A.G.1
  • 22
    • 0011711406 scopus 로고
    • A low-power CMOS circuit which emulates temporal electrical properties of neurons
    • Touretzky, S. (ed.),; Morgan Kaufmann Publishers
    • Meador, J. L. and Cole, C. S., "A low-power CMOS circuit which emulates temporal electrical properties of neurons." In Touretzky, S. (ed.), Advances in Neural Information Processing Systems. Morgan Kaufmann Publishers, 1, 1989.
    • (1989) Advances in Neural Information Processing Systems , vol.1
    • Meador, J.L.1    Cole, C.S.2
  • 23
    • 0032984543 scopus 로고    scopus 로고
    • Analog circuits for modeling biological neural networks: Design and applications
    • June
    • Le Masson, S. et al., "Analog circuits for modeling biological neural networks: Design and applications." IEEE Trans. on Biomedical Engineering 46(6), pp. 638-645, June 1999.
    • (1999) IEEE Trans. on Biomedical Engineering , vol.46 , Issue.6 , pp. 638-645
    • Le Masson, S.1
  • 24
    • 0035272406 scopus 로고    scopus 로고
    • Forward and backpropagation in a silicon dendrite
    • March
    • Rasche, C. and Douglas, R. J., "Forward and backpropagation in a silicon dendrite." IEEE Trans. on Neural Networks 12(2), pp. 386-393, March 2001.
    • (2001) IEEE Trans. on Neural Networks , vol.12 , Issue.2 , pp. 386-393
    • Rasche, C.1    Douglas, R.J.2
  • 25
    • 0011709905 scopus 로고
    • Issues in analog VLSI and MOS techniques for neural computing
    • In: Mead, C. and Ismail, M. (eds.); Kluwer Academic Publishers
    • Bibyk, S. and Ismail, M., "Issues in analog VLSI and MOS techniques for neural computing." In: Mead, C. and Ismail, M. (eds.), Analog VLSI Implementation of Neural Systems. Kluwer Academic Publishers, 1989.
    • (1989) Analog VLSI Implementation of Neural Systems
    • Bibyk, S.1    Ismail, M.2
  • 26
    • 0022737842 scopus 로고
    • Analog MOS integrated circuits-Certain new ideas, trends, and obstacles
    • June
    • Tsividis, Y., "Analog MOS integrated circuits-certain new ideas, trends, and obstacles." IEEE Journal of Solid-State Circuits SC-22(3), pp. 317-321, June 1987.
    • (1987) IEEE Journal of Solid-State Circuits , vol.SC-22 , Issue.3 , pp. 317-321
    • Tsividis, Y.1
  • 27
    • 0011709906 scopus 로고    scopus 로고
    • Analog hardware implementation of continuous-time adaptive filter structures
    • In: Cauwenberghs, G. and Bayoumi, M. B. (eds.); Kluwer Academic Publishers
    • Harris, J. G. et al., "Analog hardware implementation of continuous-time adaptive filter structures." In: Cauwenberghs, G. and Bayoumi, M. B. (eds.), Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems
    • Harris, J.G.1
  • 28
    • 0028460837 scopus 로고
    • Analog VLSI signal processing: Why, where, and how?
    • Vittoz, E. A., "Analog VLSI signal processing: Why, where, and how?" Journal of VLSI Signal Processing 8, pp. 27-44, 1994.
    • (1994) Journal of VLSI Signal Processing , vol.8 , pp. 27-44
    • Vittoz, E.A.1
  • 29
    • 0029325045 scopus 로고
    • Precision issues for learning with analog VLSI multilayer perceptrons
    • June
    • Cairns, G. and Tarassenko, L., "Precision issues for learning with analog VLSI multilayer perceptrons." IEEE MICRO 15(3), pp. 54-56, June 1995.
    • (1995) IEEE MICRO , vol.15 , Issue.3 , pp. 54-56
    • Cairns, G.1    Tarassenko, L.2
  • 31
    • 0028447909 scopus 로고
    • A high-speed analog neural processor
    • June
    • Masa, P., Hoen, K. and Wallinga, H., "A high-speed analog neural processor." IEEE Micro 14(3), pp. 40-50, June 1994.
    • (1994) IEEE Micro , vol.14 , Issue.3 , pp. 40-50
    • Masa, P.1    Hoen, K.2    Wallinga, H.3
  • 32
    • 0024909727 scopus 로고
    • An electrically trainable artificial neural network (ETANN) with 10240 floating gate synapses
    • Washington DC
    • Holler, M., Tam, S., Castro, H. and Benson, R., "An electrically trainable artificial neural network (ETANN) with 10240 floating gate synapses," in Proc. of IJCNN, Washington DC, 2, pp. 191-196, 1989.
    • (1989) Proc. of IJCNN , vol.2 , pp. 191-196
    • Holler, M.1    Tam, S.2    Castro, H.3    Benson, R.4
  • 33
    • 33747816084 scopus 로고
    • VLSI design of compact and high precision analog neural network processor
    • Choi, J. and Sheu, B., "VLSI design of compact and high precision analog neural network processor," in Proc. of IJCNN 2, pp. 637-641, 1992.
    • (1992) Proc. of IJCNN , vol.2 , pp. 637-641
    • Choi, J.1    Sheu, B.2
  • 34
    • 0011709349 scopus 로고    scopus 로고
    • 10 mW CMOS retina and classifier for handheld, 1000 images per second optical character recognition systems
    • Masa, P. et al., "10 mW CMOS retina and classifier for handheld, 1000 images per second optical character recognition systems," in Proc. ISSCC'99, San Francisco, 1999.
    • Proc. ISSCC'99, San Francisco, 1999
    • Masa, P.1
  • 36
    • 0030122857 scopus 로고    scopus 로고
    • An analog VLSI neural network with on-chip back propagation learning
    • Kluwer Academic Publisher
    • Valle, M., Caviglia, D. D., Bisio, G. M. "An analog VLSI neural network with on-chip back propagation learning." Analog Integrated Circuits and Signal Processing, Kluwer Academic Publisher, 9, pp. 231-245, 1996.
    • (1996) Analog Integrated Circuits and Signal Processing , vol.9 , pp. 231-245
    • Valle, M.1    Caviglia, D.D.2    Bisio, G.M.3
  • 37
    • 0001073983 scopus 로고
    • A contrast sensitive silicon retina with reciprocal synapses
    • In: Moody, J. E., Hanson, S. J. and Lippmann, R. P. (eds.):; San Mateo, CA: Morgan Kaufmann Publishers
    • Boahen, K. A. and Andreou, A. G., "A contrast sensitive silicon retina with reciprocal synapses." In: Moody, J. E., Hanson, S. J. and Lippmann, R. P. (eds.): Advances in Neural Processing Systems San Mateo, CA: Morgan Kaufmann Publishers, 4, 1992.
    • (1992) Advances in Neural Processing Systems , vol.4
    • Boahen, K.A.1    Andreou, A.G.2
  • 38
    • 0002076497 scopus 로고    scopus 로고
    • A retinomorphic vision system
    • October
    • Boahen, K. A. "A retinomorphic vision system." IEEE MICRO 1996, 16(5), pp. 30-39, October 1996.
    • (1996) IEEE MICRO 1996 , vol.16 , Issue.5 , pp. 30-39
    • Boahen, K.A.1
  • 39
    • 0036471891 scopus 로고    scopus 로고
    • A retinomorphic chip with parallel pathways: Encoding increasing, on, decreasing, and off, visual signals
    • Boahen, K. A. "A retinomorphic chip with parallel pathways: Encoding increasing, on, decreasing, and off, visual signals." Analog Integrated Circuits and Signal Processing (30), pp. 121-135, 2002.
    • (2002) Analog Integrated Circuits and Signal Processing , vol.30 , pp. 121-135
    • Boahen, K.A.1
  • 40
    • 0026868351 scopus 로고
    • Voiced-speech representation by an analog silicon model of the auditory periphery
    • May
    • Liu, W., Andreou, A. G. and Goldstein, M. H. "Voiced-speech representation by an analog silicon model of the auditory periphery." IEEE Trans. On Neural Networks 3(3), May 1992.
    • (1992) IEEE Trans. on Neural Networks , vol.3 , Issue.3
    • Liu, W.1    Andreou, A.G.2    Goldstein, M.H.3
  • 41
    • 0005374321 scopus 로고    scopus 로고
    • Silicon photoreceptors with controllable adaptive filtering properties
    • In: Cauwenberghs, G. and Bayoumi, M. B. (eds.):; Kluwer Academic Publishers
    • Liu, S. "Silicon photoreceptors with controllable adaptive filtering properties." In: Cauwenberghs, G. and Bayoumi, M. B. (eds.): Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems
    • Liu, S.1
  • 42
    • 0035272777 scopus 로고    scopus 로고
    • K-Winner machines for pattern classification
    • March
    • Ridella, S. et al. "K-Winner machines for pattern classification." IEEE Trans. on Neural Networks 12(2), pp. 371-385, March 2001.
    • (2001) IEEE Trans. on Neural Networks , vol.12 , Issue.2 , pp. 371-385
    • Ridella, S.1
  • 43
    • 0003415396 scopus 로고    scopus 로고
    • Learning on silicon: A survey
    • In: Cauwenberghs, G. and Bayoumi, M. B. (eds.):; Kluwer Academic Publishers
    • Cauwenberghs, G. "Learning on silicon: A survey." In: Cauwenberghs, G. and Bayoumi, M. B. (eds.): Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems
    • Cauwenberghs, G.1
  • 45
    • 0024863473 scopus 로고
    • Neural network models for pattern recognition and associative memory
    • Carpenter, G. A. "Neural network models for pattern recognition and associative memory." Neural Networks 2(4), pp. 243-257, 1989.
    • (1989) Neural Networks , vol.2 , Issue.4 , pp. 243-257
    • Carpenter, G.A.1
  • 49
    • 0026712578 scopus 로고
    • Weight perturbation: An optimal architecture and learning technique for analog VLSI feedforward and recurrent multilayer networks
    • Jabri, M. and Flower, B. "Weight perturbation: An optimal architecture and learning technique for analog VLSI feedforward and recurrent multilayer networks." IEEE Trans. Neural Networks 3(1), pp. 154-157, 1992.
    • (1992) IEEE Trans. Neural Networks , vol.3 , Issue.1 , pp. 154-157
    • Jabri, M.1    Flower, B.2
  • 54
    • 0026396071 scopus 로고
    • An analysis on the performance of silicon implementations of backpropagation algorithms for artificial neural networks
    • Reyneri, L. M. and Filippi, E., "An analysis on the performance of silicon implementations of backpropagation algorithms for artificial neural networks." IEEE Trans. on Computers 12, pp. 1380-1389, 1991.
    • (1991) IEEE Trans. on Computers , vol.12 , pp. 1380-1389
    • Reyneri, L.M.1    Filippi, E.2
  • 56
    • 0024137490 scopus 로고
    • Increased rates of convergence through learning rate adaptation
    • Jacobs, B. A. "Increased rates of convergence through learning rate adaptation." Neural Networks 4, pp. 295-307, 1988.
    • (1988) Neural Networks , vol.4 , pp. 295-307
    • Jacobs, B.A.1
  • 57
    • 0025593679 scopus 로고
    • SuperSAB: Fast adaptive back propagation with good scaling properties
    • Tollenaere, T. "SuperSAB: Fast adaptive back propagation with good scaling properties." Neural Networks 3, pp. 561-573, 1990.
    • (1990) Neural Networks , vol.3 , pp. 561-573
    • Tollenaere, T.1
  • 58
    • 0003458767 scopus 로고    scopus 로고
    • Analogue imprecision in MLP training
    • World Scientific Publishing Co. Pte. Ltd.
    • Edwards, P. J. and Murray, A. F. "Analogue imprecision in MLP training." World Scientific Publishing Co. Pte. Ltd., 1996.
    • (1996)
    • Edwards, P.J.1    Murray, A.F.2
  • 60
    • 0032630104 scopus 로고    scopus 로고
    • A circuit architecture for analog on-chip back propagation learning with local learning rate adaptation
    • Bo, G. M.; Caviglia, D. D.; Chiblé, H. and Valle, M. "A circuit architecture for analog on-chip back propagation learning with local learning rate adaptation." Analog Integrated Circuits and Signal Processing 18(2/3), pp. 163-174, 1999.
    • (1999) Analog Integrated Circuits and Signal Processing , vol.18 , Issue.2-3 , pp. 163-174
    • Bo, G.M.1    Caviglia, D.D.2    Chiblé, H.3    Valle, M.4
  • 61
    • 0036740528 scopus 로고    scopus 로고
    • A self-learning analog neural processor
    • To be published on IEICE Trans. on Fundamentals
    • Bo, G. M., Caviglia, D. D., Chiblé, H. and Valle, M. "A self-learning analog neural processor." To be published on IEICE Trans. on Fundamentals, 2002.
    • (2002)
    • Bo, G.M.1    Caviglia, D.D.2    Chiblé, H.3    Valle, M.4
  • 63
    • 0026866931 scopus 로고
    • Functional abilities of a stochastic logic neural network
    • May
    • Kondo, Y. and Sawada, Y., "Functional abilities of a stochastic logic neural network." IEEE Trans. on Neural Networks 3(3), pp. 434-443, May 1992.
    • (1992) IEEE Trans. on Neural Networks , vol.3 , Issue.3 , pp. 434-443
    • Kondo, Y.1    Sawada, Y.2
  • 64
    • 0026124101 scopus 로고
    • Current-mode subthreshold MOS circuits for analog VLSI neural systems
    • March
    • Andreou, A. G. et al. "Current-mode subthreshold MOS circuits for analog VLSI neural systems." IEEE Trans. on Neural Networks 2(2), March 1991.
    • (1991) IEEE Trans. on Neural Networks , vol.2 , Issue.2
    • Andreou, A.G.1
  • 66
    • 0011767231 scopus 로고
    • VLSI architectures for neural networks
    • In: Antognetti, P. and Milutinovic V. (eds.):; Prentice Hall Publisher
    • Alspector, J. et al., "VLSI architectures for neural networks." In: Antognetti, P. and Milutinovic V. (eds.): Neural Networks: Concepts, Applications and Implementations I, Prentice Hall Publisher, pp. 180-215, 1991.
    • (1991) Neural Networks: Concepts, Applications and Implementations I , pp. 180-215
    • Alspector, J.1
  • 70
    • 0001794218 scopus 로고    scopus 로고
    • Hybrid connectionist models for continuous speech recognition
    • In: Lee, C., Soong, F. K. and Paliwal, K. K. (eds.):; Kluwer Academic Publishers
    • Boulard, H. and Morgan, N. "Hybrid connectionist models for continuous speech recognition." In: Lee, C., Soong, F. K. and Paliwal, K. K. (eds.): Automatic Speech and Speaker Recognition. Kluwer Academic Publishers, pp. 259-283, 1996.
    • (1996) Automatic Speech and Speaker Recognition , pp. 259-283
    • Boulard, H.1    Morgan, N.2
  • 72
    • 0011709162 scopus 로고    scopus 로고
    • An adaptive local rate technique for hierarchical feed forward architectures
    • Piscataway, NJ, Como, Italy: IEEE Press, 24-27 July
    • Diotalevi, F., Valle, M. and Caviglia, D. D. "An adaptive local rate technique for hierarchical feed forward architectures." IEEE-INNS-ENNS International Joint Conference on Neural Networks, Piscataway, NJ, Como, Italy: IEEE Press, 24-27 July 2000.
    • (2000) IEEE-INNS-ENNS International Joint Conference on Neural Networks , pp. 24-27
    • Diotalevi, F.1    Valle, M.2    Caviglia, D.D.3
  • 73
    • 2442579845 scopus 로고    scopus 로고
    • Analog microelectronic supervised learning systems
    • Ph.D. Thesys
    • Diotalevi, F. "Analog microelectronic supervised learning systems." Ph.D. Thesys, http://www.micro.dibe.unige.it/works/FDiotalevi_PHD_Thesis.zip.
    • Diotalevi, F.1
  • 74
    • 0011710199 scopus 로고    scopus 로고
    • Weight perturbation learning algorithm with local learning rate adaptation for the classification of remote-sensing images
    • Bruges (Belgium): D-Facto Publisher; 25-27 April.; (ISBN 2-930307-01-3)
    • Diotalevi, F. and Valle, M. "Weight perturbation learning algorithm with local learning rate adaptation for the classification of remote-sensing images." ESANN'01, Bruges (Belgium): D-Facto Publisher,;, pp. 217-222, 25-27 April.; 2001. (ISBN 2-930307-01-3).
    • (2001) ESANN'01 , pp. 217-222
    • Diotalevi, F.1    Valle, M.2
  • 75
    • 0030106428 scopus 로고    scopus 로고
    • An analog VLSI recurrent neural network learning a continuous-time trajectory
    • Cauwenberghs, G. "An analog VLSI recurrent neural network learning a continuous-time trajectory." IEEE Transaction on Neural Networks 7(2), pp. 346-361, 1996.
    • (1996) IEEE Transaction on Neural Networks , vol.7 , Issue.2 , pp. 346-361
    • Cauwenberghs, G.1
  • 76
    • 0000726115 scopus 로고
    • The effects of precision constraints in a backpropagation learning network
    • Hollis, P. W. et al. "The effects of precision constraints in a backpropagation learning network." Neural Computation 2, pp. 363-373, 1990.
    • (1990) Neural Computation , vol.2 , pp. 363-373
    • Hollis, P.W.1
  • 77
    • 0033100852 scopus 로고    scopus 로고
    • Worst case analysis of weight inaccuracy effects in multilayer perceptrons
    • March
    • Anguita, D. et al. "Worst case analysis of weight inaccuracy effects in multilayer perceptrons." IEEE Trans. on Neural Networks 10(2), pp. 415-418, March 1999.
    • (1999) IEEE Trans. on Neural Networks , vol.10 , Issue.2 , pp. 415-418
    • Anguita, D.1
  • 78
    • 0031119624 scopus 로고    scopus 로고
    • An analog VLSI neural network with on-chip perturbation learning
    • March
    • Montalvo, A. J. et al. "An analog VLSI neural network with on-chip perturbation learning." IEEE Journal of Solid State Circuits, 32(4), pp. 535-543, March 1997.
    • (1997) IEEE Journal of Solid State Circuits , vol.32 , Issue.4 , pp. 535-543
    • Montalvo, A.J.1
  • 79
    • 0031095256 scopus 로고    scopus 로고
    • Towards a general-pourpose analog VLSI neural network with on-chip learning
    • March
    • Montalvo, A. J. et al. "Towards a general-pourpose analog VLSI neural network with on-chip learning." IEEE Trans. on Neural Networks 8(2), pp. 413-423, March 1997.
    • (1997) IEEE Trans. on Neural Networks , vol.8 , Issue.2 , pp. 413-423
    • Montalvo, A.J.1
  • 81
    • 0025445432 scopus 로고
    • Artificial neural networks using MOS analog multiplier
    • June
    • Hollis, P. W. and Paulos, J. J. "Artificial neural networks using MOS analog multiplier." IEEE JSSCs 25(3), pp. 849-855, June 1990.
    • (1990) IEEE JSSCs , vol.25 , Issue.3 , pp. 849-855
    • Hollis, P.W.1    Paulos, J.J.2
  • 82
    • 0026679533 scopus 로고
    • An analog neural computer with modular architecture for real-time dynamic computations
    • January
    • van Der Spiegel, J. V. et al. "An analog neural computer with modular architecture for real-time dynamic computations." IEEE JSSCs 22(1), pp. 82-91, January 1992.
    • (1992) IEEE JSSCs , vol.22 , Issue.1 , pp. 82-91
    • Van Der Spiegel, J.V.1
  • 83
    • 0011738437 scopus 로고
    • Flash-based programmable nonlinear capacitor for switched-capacitor implementations of neural networks
    • December
    • Kramer A. et al. "Flash-based programmable nonlinear capacitor for switched-capacitor implementations of neural networks." IEDM Tech. Dig., pp. 17.6.1-17.6.4, December 1994.
    • (1994) IEDM Tech. Dig.
    • Kramer, A.1
  • 86
    • 0032204665 scopus 로고    scopus 로고
    • An 8-bit-resolution, 360-μs write time non-volatile analog memory based on differentially balanced constant-tunnelling-current scheme (DBCS)
    • Kim, K., Lee, K., Jung, T. and Suh, K. "An 8-bit-resolution, 360-μs write time non-volatile analog memory based on differentially balanced constant-tunnelling-current scheme (DBCS)." IEEE Journal of Solid State Circuits 33(11), pp. 1758-1762, 1998.
    • (1998) IEEE Journal of Solid State Circuits , vol.33 , Issue.11 , pp. 1758-1762
    • Kim, K.1    Lee, K.2    Jung, T.3    Suh, K.4
  • 88
    • 0024946516 scopus 로고
    • Pulse arithmetic in VLSI neural networks
    • Murray, A. F. "Pulse arithmetic in VLSI neural networks." IEEE Micro 9(6), pp. 64-74, 1989.
    • (1989) IEEE Micro , vol.9 , Issue.6 , pp. 64-74
    • Murray, A.F.1
  • 89
    • 0024647086 scopus 로고
    • A programmable analog neural network chip
    • Schwartz, D. B. et al. "A programmable analog neural network chip." IEEE Journal of Solid State Circuits 24(2), pp. 313-319, 1989.
    • (1989) IEEE Journal of Solid State Circuits , vol.24 , Issue.2 , pp. 313-319
    • Schwartz, D.B.1
  • 90
    • 0025387945 scopus 로고
    • Programmable analog vector-matrix multipliers
    • February
    • Kub, F. J. et al. "Programmable analog vector-matrix multipliers." IEEE Journal of Solid State Circuits 25(1), pp. 207-214, February 1990.
    • (1990) IEEE Journal of Solid State Circuits , vol.25 , Issue.1 , pp. 207-214
    • Kub, F.J.1
  • 93
    • 2342580599 scopus 로고
    • Analog storage of adjustable synaptic weights
    • In Ramacher, U. (ed.); Kluwer Academic Publisher
    • Vittoz, E. et al. "Analog storage of adjustable synaptic weights." In Ramacher, U. (ed.); Introduction to VLSI Design of Neural Networks. Kluwer Academic Publisher, 1991.
    • (1991) Introduction to VLSI Design of Neural Networks
    • Vittoz, E.1
  • 94
    • 0026219838 scopus 로고
    • Self refreshing analogue memory cell for variable synaptic weights
    • Castello, R., Caviglia, D. D., Franciotta, M., Montecchi, F. "Self refreshing analogue memory cell for variable synaptic weights." IEE Electronics Letters 27(20), pp. 1871-1872, 1991.
    • (1991) IEE Electronics Letters , vol.27 , Issue.20 , pp. 1871-1872
    • Castello, R.1    Caviglia, D.D.2    Franciotta, M.3    Montecchi, F.4
  • 95
    • 0026123818 scopus 로고
    • Implementation of a learning Kohonen neuron based on a new multilevel storage technique
    • March
    • Hochet, B. et al. "Implementation of a learning Kohonen neuron based on a new multilevel storage technique." IEEE Journal of Solid State Circuits 26(3), pp. 262-267, March 1991.
    • (1991) IEEE Journal of Solid State Circuits , vol.26 , Issue.3 , pp. 262-267
    • Hochet, B.1
  • 96
    • 0028712023 scopus 로고
    • Fault-tolerant dynamic multilevel storage in analog VLSI
    • Cauwenberghs, G. and Yariv, A. "Fault-tolerant dynamic multilevel storage in analog VLSI." IEEE Trans. on Circuits and Systems II 41(2), pp. 827-829, 1994.
    • (1994) IEEE Trans. on Circuits and Systems II , vol.41 , Issue.2 , pp. 827-829
    • Cauwenberghs, G.1    Yariv, A.2
  • 97
    • 0032122759 scopus 로고    scopus 로고
    • A 12-bit medium-time analog storage device in a CMOS standard process
    • Ehlert, M. and Klair, H. "A 12-bit medium-time analog storage device in a CMOS standard process." IEEE Journal of Solid State Circuits 33(7), pp. 1139-1143, 1998.
    • (1998) IEEE Journal of Solid State Circuits , vol.33 , Issue.7 , pp. 1139-1143
    • Ehlert, M.1    Klair, H.2
  • 99
    • 0004069567 scopus 로고    scopus 로고
    • Analog VLSI integration of massive parallel processing systems
    • Kluwer Academic Publishers, November
    • Kinget, P. and Steyaert, M. "Analog VLSI integration of massive parallel processing systems." Kluwer Academic Publishers, November 1996.
    • (1996)
    • Kinget, P.1    Steyaert, M.2
  • 102
    • 0029378529 scopus 로고
    • Tolerance to analog hardware of on-chip learning in backpropagation networks
    • Dolenko, B. K. and Card, H. C. "Tolerance to analog hardware of on-chip learning in backpropagation networks." IEEE Trans. on Neural Networks 6(5), pp. 1045-1052, 1995.
    • (1995) IEEE Trans. on Neural Networks , vol.6 , Issue.5 , pp. 1045-1052
    • Dolenko, B.K.1    Card, H.C.2
  • 103
    • 0002205089 scopus 로고    scopus 로고
    • Analog VLSI implementation of self learning neural networks
    • In: Cauwenberghs, G. and Bayoumi, M. (eds.):; Kluwer Academic Publishers
    • Morie, T. "Analog VLSI implementation of self learning neural networks." In: Cauwenberghs, G. and Bayoumi, M. (eds.): Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems
    • Morie, T.1
  • 106
    • 0011739372 scopus 로고    scopus 로고
    • Biologically-inspired learning in pulsed neural networks
    • In: Cauwenberghs, G. and Bayoumi, M. (eds.):; Kluwer Academic Publishers
    • Lehmann, T. and Woodburn, R. "Biologically-inspired learning in pulsed neural networks." In: Cauwenberghs, G. and Bayoumi, M. (eds.): Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers., pp. 105-130, 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems , pp. 105-130
    • Lehmann, T.1    Woodburn, R.2
  • 109
    • 0028384779 scopus 로고
    • Integrated continuous-time filter design-An overview
    • March
    • Tsividis, Y., "Integrated continuous-time filter design-an overview." IEEE Journal of Solid State Circuits 29(3), pp. 166-176, March 1994.
    • (1994) IEEE Journal of Solid State Circuits , vol.29 , Issue.3 , pp. 166-176
    • Tsividis, Y.1
  • 110
    • 0013195916 scopus 로고    scopus 로고
    • An information theoretic framework for comparing the bit energy of signal representations at the circuit level
    • In: Sanchez-Sinencio, E. and Andreou, A. G. (eds.):; IEEE Press
    • Andreou, A. G. and Furth, P. M., "An information theoretic framework for comparing the bit energy of signal representations at the circuit level." In: Sanchez-Sinencio, E. and Andreou, A. G. (eds.): Low-Voltage Low-Power Integrated Circuits and Systems. IEEE Press, 1999.
    • (1999) Low-Voltage Low-Power Integrated Circuits and Systems
    • Andreou, A.G.1    Furth, P.M.2
  • 112
    • 0001894607 scopus 로고    scopus 로고
    • Array-based computation: Principles, advantages and limitations
    • Kramer, A. H., "Array-based computation: Principles, advantages and limitations," in Proc. of Microneuro'96, pp. 68-79, 1996.
    • (1996) Proc. of Microneuro'96 , pp. 68-79
    • Kramer, A.H.1
  • 113
    • 0034317726 scopus 로고    scopus 로고
    • Digital signal processor trends
    • November/December
    • Frantz, G., "Digital signal processor trends." IEEE Micro 20(6), pp. 52-59, November/December 2000.
    • (2000) IEEE Micro , vol.20 , Issue.6 , pp. 52-59
    • Frantz, G.1
  • 115
    • 0003943945 scopus 로고
    • Hardware learning in analog VLSI neural networks
    • Ph.D. Thesis, Electronics Institute, Technical University of Denmark
    • Lehmann, T., "Hardware learning in analog VLSI neural networks." Ph.D. Thesis, Electronics Institute, Technical University of Denmark, 1994. (http://eivind.imm.dtu.dk/publications/phdthesis.html).
    • (1994)
    • Lehmann, T.1
  • 117
    • 0003078702 scopus 로고    scopus 로고
    • Analog VLSI on-chip learning neural network with learning rate adaptation
    • In: Cauwenberghs, G., Bayoumi, M. A. (eds.):; Kluwer Academic Publishers; June
    • Bo, G. M., Chiblé, H., Caviglia, D. D. and Valle, M., "Analog VLSI on-chip learning neural network with learning rate adaptation." In: Cauwenberghs, G., Bayoumi, M. A. (eds.): Learning on Silicon-Adaptive VLSI Neural Systems. Kluwer Academic Publishers, pp. 305-330, June 1999.
    • (1999) Learning on Silicon-Adaptive VLSI Neural Systems , pp. 305-330
    • Bo, G.M.1    Chiblé, H.2    Caviglia, D.D.3    Valle, M.4
  • 118
    • 0036534928 scopus 로고    scopus 로고
    • An on-chip BP learning neural network with ideal neuron characteristics and learning rate adaptation
    • Lu, C., Shi, B. and Chen, L., "An on-chip BP learning neural network with ideal neuron characteristics and learning rate adaptation." Analog Integrated Circuits and Signal Processing 31, pp. 55-62, 2002.
    • (2002) Analog Integrated Circuits and Signal Processing , vol.31 , pp. 55-62
    • Lu, C.1    Shi, B.2    Chen, L.3
  • 119
    • 0011709275 scopus 로고    scopus 로고
    • http://dspvillage.ti.com/docs/dspproducthome.jhtml
  • 120
    • 0002361722 scopus 로고    scopus 로고
    • Array-based analog computation
    • October
    • Kramer, A. H., "Array-based analog computation," in IEEE Micro 1996 16(5), pp. 20-29, October 1996.
    • (1996) IEEE Micro 1996 , vol.16 , Issue.5 , pp. 20-29
    • Kramer, A.H.1
  • 123
    • 0011711409 scopus 로고
    • Back-propagation learning algorithms for analog VLSI implementation, in VLSI for neural networks and artificial intelligence
    • New York. Oxford UK: Plenum Press, 2-4 September 1992; In: Delgado-Frias, J. D. and Moore, W. R. (eds.); (ISBN: 0-306-44722-3)
    • Valle, M., Caviglia, D. D. and Bisio, G. M., "Back-propagation learning algorithms for analog VLSI implementation, in VLSI for neural networks and artificial intelligence," in Proc. International Workshop on VLSI for Neural Networks and Artificial Intelligence, New York. Oxford UK: Plenum Press, 2-4 September 1992; In: Delgado-Frias, J. D. and Moore, W. R. (eds.), 1994, pp. 35-44. (ISBN: 0-306-44722-3).
    • (1994) Proc. International Workshop on VLSI for Neural Networks and Artificial Intelligence , pp. 35-44
    • Valle, M.1    Caviglia, D.D.2    Bisio, G.M.3
  • 124
    • 0032186579 scopus 로고    scopus 로고
    • A 16 × 16 nonvolatile programmable analog vector-matrix multiplier
    • October
    • Aslam-Siddiqi, A. et al., "A 16 × 16 nonvolatile programmable analog vector-matrix multiplier." IEEE Journal of Solid-State Circuits, 33(10), pp. 1502-1509, October 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , Issue.10 , pp. 1502-1509
    • Aslam-Siddiqi, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.