An on-chip BP learning neural network with ideal neuron characteristics and learning rate adaptation

Analog Integrated Circuits and Signal Processing

Volumn 31, Issue 1, 2002, Pages 55-62

  Lu, Chun ^a   Shi, Bing Xue ^a   Chen, Lu ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

Circuit design; Hardware implementation; Neural network; On chip BP learning

Indexed keywords

BACKPROPAGATION; CMOS INTEGRATED CIRCUITS; FUNCTIONS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; LEARNING ALGORITHMS; LSI CIRCUITS;

LEARNING RATE ADAPTATION CIRCUIT; SIGMOID FUNCTION;

NEURAL NETWORKS;

EID: 0036534928     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1014476806076     Document Type: Article

References (12)

1. Neuro chips with on-chip back-propagation and/or hebbian learning
2. An all-analog expandable neural-network LSI with on-chip back-propagation learning
3. Tolerance to analog hardware of on-chip learning in backpropagation networks
4. Analog LSI implementation of self-learning neural networks
5. An analog VLSI recurrent neural network learning a continuous-time trajectory
6. An analog feed-forward neural network with on-chip learning
7. An analog VLSI neural network with on-chip back propagation learning
8. Circuit design of an adjustable neuron activation function and its derivative
9. Analog VLSI on-chip learning neural network with learning rate adaptation
10. Low power building block for artificial neural networks
11. General-purpose neural chips with electrically programmable synapse and gain-adjustable neurons