-
1
-
-
0028495068
-
An all-analog expandable neural network LSI with on-chip back-propagation learning
-
Sept.
-
T. Morie and Y. Amemiya, "An all-analog expandable neural network LSI with on-chip back-propagation learning," IEEE J. Solid-State Circuits, vol. 29, pp. 1086-1093, Sept. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, pp. 1086-1093
-
-
Morie, T.1
Amemiya, Y.2
-
2
-
-
0024909727
-
An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses
-
June
-
M. Holler, S. Tam, H. Castro, and R. Benson, "An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses," in Proc. IEEE Int. Conf. Neural Networks, June 1989, vol. 2, pp. 191-196.
-
(1989)
Proc. IEEE Int. Conf. Neural Networks
, vol.2
, pp. 191-196
-
-
Holler, M.1
Tam, S.2
Castro, H.3
Benson, R.4
-
3
-
-
0026727537
-
A reconfigurable VLSI neural network
-
Jan.
-
S. Satyanarayana, Y. Tsividis, and H. Graf, "A reconfigurable VLSI neural network," IEEE J. Solid-State Circuits, vol. 27, pp. 67-81, Jan. 1992.
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, pp. 67-81
-
-
Satyanarayana, S.1
Tsividis, Y.2
Graf, H.3
-
4
-
-
0040378007
-
Analog VLSI circuits for visual motion-based adaptation of post-Saccadic drift
-
T. Horiuchi and C. Koch, "Analog VLSI circuits for visual motion-based adaptation of post-Saccadic drift," in Proc. MicroNeuro'96, pp. 60-66.
-
Proc. MicroNeuro'96
, pp. 60-66
-
-
Horiuchi, T.1
Koch, C.2
-
5
-
-
70349420042
-
Implementation of time-multiplexed CNN building block cell
-
K. Lai and P. Leong, "Implementation of time-multiplexed CNN building block cell," in Proc. MicroNeuro'96, pp. 80-85.
-
Proc. MicroNeuro'96
, pp. 80-85
-
-
Lai, K.1
Leong, P.2
-
7
-
-
2342580599
-
Analog storage of adjustable synaptic weights
-
U. Ramacher and U. Rückert, Eds. Norwell, MA: Kluwer Academic
-
E. Vittoz, H. Oguey, M. A. Maher, O. Nys, E. Dijkstra, and M. Chevroulet, "Analog storage of adjustable synaptic weights," in VLSI Design of Neural Networks, U. Ramacher and U. Rückert, Eds. Norwell, MA: Kluwer Academic, 1991, pp. 47-64.
-
(1991)
VLSI Design of Neural Networks
, pp. 47-64
-
-
Vittoz, E.1
Oguey, H.2
Maher, M.A.3
Nys, O.4
Dijkstra, E.5
Chevroulet, M.6
-
8
-
-
0024940538
-
A 10-bit video BiCMOS track-and-hold amplifier
-
Dec.
-
M. Nayebi and B. Wooley, "A 10-bit video BiCMOS track-and-hold amplifier," IEEE J. Solid-State Circuits, vol. 24, pp. 1507-1516, Dec. 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, pp. 1507-1516
-
-
Nayebi, M.1
Wooley, B.2
-
9
-
-
0016334230
-
A complete monolithic sample/hold amplifier
-
Dec.
-
K. Stafford, P. Gray, and R. Blanchard, "A complete monolithic sample/hold amplifier," IEEE J. Solid-State Circuits, vol. SC-9, pp. 381-387, Dec. 1974.
-
(1974)
IEEE J. Solid-State Circuits
, vol.SC-9
, pp. 381-387
-
-
Stafford, K.1
Gray, P.2
Blanchard, R.3
-
10
-
-
0030286542
-
Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization
-
Nov.
-
C. C. Enz and G. C. Temes, "Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization," Proc. IEEE, vol. 84, pp. 1584-1614, Nov. 1996.
-
(1996)
Proc. IEEE
, vol.84
, pp. 1584-1614
-
-
Enz, C.C.1
Temes, G.C.2
|