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Volumn 9, Issue 3, 1996, Pages 231-245

An experimental analog VLSI neural network with on-chip back-propagation learning

Author keywords

[No Author keywords available]

Indexed keywords

BACKPROPAGATION; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DATA PROCESSING; INTEGRATED CIRCUIT LAYOUT; LEARNING ALGORITHMS; LEARNING SYSTEMS; LINEAR INTEGRATED CIRCUITS; LINEAR NETWORK SYNTHESIS; MICROPROCESSOR CHIPS; NEURAL NETWORKS; SYSTEMS ANALYSIS;

EID: 0030122857     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00194907     Document Type: Article
Times cited : (34)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.