SILC dynamics in MOS structures subject to periodic stress

IEEE Transactions on Electron Devices

Volumn 49, Issue 10, 2002, Pages 1729-1735

  Irrera, Fernanda ^a,b   Riccò, Bruno ^a,c  

^a IEEE   (Italy)

^b SAPIENZA UNIVERSITY OF ROME   (Italy)

^c UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

MOS capacitors; Nonvolatile memories; Oxide degradation; Reliability simulation; Stress induced leakage current (SILC)

Indexed keywords

OXIDE DEGRADATION; STRESS-INDUCED LEAKAGE CURRENT; TRAP ANNEALING; VOLTAGE STRESS;

ANNEALING; COMPUTER SIMULATION; LEAKAGE CURRENTS; MATHEMATICAL PROGRAMMING; NONVOLATILE STORAGE; OXIDES; RELIABILITY; SEMICONDUCTOR DEVICE STRUCTURES; STRESSES;

MOS CAPACITORS;

EID: 0036773381     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.802671     Document Type: Article

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