Impact of pad and gate parasitics on small-signal and noise modeling of 0.35 μm gate length MOS transistors

IEEE Transactions on Electron Devices

Volumn 49, Issue 5, 2002, Pages 871-880

  Sakalas, Paulius ^b,c   Zirath, Herbert G ^a,d,e   Litwin, Andrej ^a,f   Schröter, Michael ^a,g   Matulionis, Arvydas ^c  

^a IEEE

^b Electronische Bauelemente und Integrierte Schaltungen   (Germany)

^c CENTER FOR PHYSICAL SCIENCES AND TECHNOLOGY   (Lithuania)

^d CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

^e Ericsson Microwave Systems AB   (Sweden)

^f ERICSSON RESEARCH   (Sweden)

^g DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

MOSFETs; Noise; Scattering parameters; Small signal model

Indexed keywords

COMPUTER SIMULATION; GATES (TRANSISTOR); INDUCTANCE; SCATTERING PARAMETERS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SPURIOUS SIGNAL NOISE;

DRAIN CURRENTS; GATE PARASITIC CIRCUIT; MICROWAVE NOISE; PARASITIC INDUCTANCE; SMALL SIGNAL MODEL;

MOSFET DEVICES;

EID: 0036564634     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.998597     Document Type: Article

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