A fault tolerant approach to microprocessor design

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2001, Pages 411-420

  Weaver, Chris ^a   Austin, Todd ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; ERROR DETECTION; FAULT TOLERANT COMPUTER SYSTEMS; PIPELINE PROCESSING SYSTEMS; SPURIOUS SIGNAL NOISE;

MICROPROCESSOR DESIGN;

MICROPROCESSOR CHIPS;

EID: 0035789633     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2001.941425     Document Type: Conference Paper

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