Two silicon nitride technologies for post-SiO2 MOSFET gate dielectric

IEEE Electron Device Letters

Volumn 22, Issue 7, 2001, Pages 324-326

  Lu, Qiang ^b   Yeo, Yee Chia ^b   Yang, Kevin J ^b   Lin, Ronald ^b,c   Polishchuk, Igor ^a,b   King, Tsu Jae ^a,b   Hu, Chenming ^a,b   Song, S C ^d,e   Luan, H F ^d   Kwong, Dim Lee ^a,d   Guo, Xin ^f,g   Luo, Zhijiong ^g   Wang, Xiewen ^a,g   Tso Ping, Ma ^a,g  

^a IEEE

^b UNIVERSITY OF CALIFORNIA   (United States)

^c PDF SOLUTIONS INC   (United States)

^d The University of Texas at Austin   (United States)

^e MOTOROLA INC   (United States)

^f Yale University   (United States)

^g ADVANCED MICRO DEVICES   (United States)

Author keywords

Gate dielectric; Jet vapor deposition (JVD); MOSFET; Rapid thermal CVD (RTCVD); Silicon nitride

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); LEAKAGE CURRENTS; PHOTOLITHOGRAPHY; RAPID THERMAL ANNEALING; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON NITRIDE;

JET VAPOR DEPOSITION; MOSFET GATE DIELECTRIC; RAPID THERMAL CHEMICAL VAPOR DEPOSITION;

MOSFET DEVICES;

EID: 0035397660     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.930679     Document Type: Article

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