Mapping of mechanical, thermomechanical and wire-bond strain fields in packaged Si integrated circuits using synchrotron white beam X-ray topography

IEEE Transactions on Components and Packaging Technologies

Volumn 24, Issue 1, 2001, Pages 76-83

  McNally, Patrick J ^a,b   Rantamaki R ^c   Tuomi, T ^c   Danilewsky, A N ^d   Lowney, Donnacha ^a,b   Curley, John W ^a,e   Herbert, P A F ^f  

^a IEEE   (Ireland)

^b DUBLIN CITY UNIVERSITY   (Ireland)

^c AALTO UNIVERSITY   (Finland)

^d UNIVERSITY OF FREIBURG   (Germany)

^e Littelfuse ^*  (Ireland)

^f Plasma Ireland Ltd   (Ireland)

Author keywords

High resolution; Nondestructive evaluation; Packaged integrated circuits; Strain fields; Synchrotron x ray topography

Indexed keywords

ERASABLE PROGRAMMABLE READ ONLY MEMORY (EPROM);

ELECTRIC WIRE; ELECTRONICS PACKAGING; PROM; SEMICONDUCTING SILICON; STRAIN; STRESS ANALYSIS; THERMOMECHANICAL TREATMENT; X RAY ANALYSIS;

INTEGRATED CIRCUIT TESTING;

EID: 0035280090     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/6144.910805     Document Type: Article

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