PRELIMINARY IN PROCESS STRESS ANALYSIS OF FLIP CHIP ASSEMBLIES DURING THERMAL CYCLING

ASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE)

Volumn 1998-AC, Issue , 1998, Pages 101-106

  Palaniappan, Prema ^a   Baldwin, Daniel F ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; FLIP CHIP DEVICES; GAS TURBINES; RELIABILITY; STRESS ANALYSIS;

EXPERIMENTAL STRESS ANALYSIS; FLIP CHIP ASSEMBLIES; IN-PROCESS; INTERCONNECT DESIGN; MECHANICAL STRESS; PACKAGE FAILURES; PIEZO-RESISTIVE; STRESS SENSING; STRESSES ANALYSIS; THERMAL-CYCLING;

THERMAL CYCLING;

EID: 84889114318     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1115/IMECE1998-0435     Document Type: Conference Paper

References (12)

1. Palaniappan, P. and Baldwin, D. F., 1997, "In-Process Stress Analysis of Flip-Chip Assemblies During Underfill, " International Mechanical Engineering Congress & Exposition, Dallas, TX, Nov 1997, pp 7-14.
2. Palaniappan, P., Selman, P., Baldwin, D. F., Wu, J., and Wong, C.P., "Correlation of Flip Chip Underfill Process Parameters and Material Properties with In-Process Stress Generation, " 48th Electronic Components and Technology Conference, Seattle, WA, May 1998., pp 838-847.
3. Palaniappan, P. and Baldwin, D. F., "Residual Stresses in Flip Chip Assemblies during Underfill Cure and Environmental Stress Testing, " International Conference on Electronics Assembly, Atlanta, GA, July 1998.
4. Sweet, J. N., D. W. Peterson, M. R. Tuck, J. M. Green, 1993, "Assembly Test Chip Ver. 04(ATC04) Description and User Guide", Sandia National Laboratories, SAND93-1901, August, pp. 2-27.
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12. Peterson, D. W., J. N. Sweet S. N. Burchett, 1997, "Validating Theoretical Calculations of Thermomechanical Stresses and Deformation using the ATC4.1 Flip-Chip Test Vehicle", Sandia National Laboratories, to be presented Sept 7- 11.