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Volumn 47, Issue 11, 2000, Pages 2208-2213

Thermal stability of CoSi2 film for CMOS salicide

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; GATES (TRANSISTOR); ION IMPLANTATION; SEMICONDUCTING FILMS; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DOPING; SPUTTERING; THERMAL EFFECTS; THERMODYNAMIC STABILITY;

EID: 0034317023     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.877185     Document Type: Article
Times cited : (27)

References (20)
  • 4
    • 0027889412 scopus 로고    scopus 로고
    • 0.1 //m-CMOS at room temperature using high performance Co salicide process," in IEDM Tech. Dig., 1993, pp. 906-907.
    • T. Yamazaki et al., "21 psc switching 0.1 //m-CMOS at room temperature using high performance Co salicide process," in IEDM Tech. Dig., 1993, pp. 906-907.
    • "21 Psc Switching
    • Yamazaki, T.1
  • 5
    • 0029715056 scopus 로고    scopus 로고
    • 0.15 /j,m single gate Co salicide CMOS," in Symp. VLSI Tech. Dig., 1996, pp. 34-35.
    • T. Yoshitomi et al., "High performance 0.15 /j,m single gate Co salicide CMOS," in Symp. VLSI Tech. Dig., 1996, pp. 34-35.
    • "High Performance
    • Yoshitomi, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.