Principles of substrate crosstalk generation in CMOS circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 19, Issue 6, 2000, Pages 645-653

  Briaire, J ^a   Krisch, K S ^b  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b Technologies Microelectronics   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CROSSTALK; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC POWER SUPPLIES TO APPARATUS; IMPACT IONIZATION; LEAKAGE CURRENTS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; STATISTICAL METHODS; SUBSTRATES;

CAPACITIVE COUPLING; GATE INDUCED DRAIN LEAKAGE; IMPACT IONIZATION CURRENT; SOFTWARE PACKAGE ADVICE; SUBSTRATE CROSSTALK; SUBSTRATE NOISE INJECTION;

SPURIOUS SIGNAL NOISE;

EID: 0033717701     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.848086     Document Type: Article

References (22)

1. D. K. Su M. J. Loinaz S. Masui and B. A. Wooley Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits IEEEJ. Solid-State Circuits vol. 28 pp. 420-4129 Apr. 1993.
2. M. Pfost and H.-M. Rein Modeling and measurement of substrate coupling in Si-bipolar 1C' s up to 40 GHz IEEE J. Solid-State Circuits vol. 33 pp. 582-591 Apr. 1998.
3. J.-P. Raskin A. Viviani D. Flandre and J.-P. Colinge Substrate crosstalk reduction using SOI technology IEEE Tran. Electron Devices vol. 44 pp. 2252-2261 Dec. 1997.
4. K. Joardar Substrate crosstalk in BiCMOS mixed mode integrated circuits Solid-State Electron. vol. 39 no. 4 pp. 511-516 1996.
5. B. R. Stanisic N. K. Verghese R. A. Rutenbar L. R. Carley and D. J. Allstot Addressing substrate coupling in mixed-mode IC's: Simulation and power distribution synthesis IEEE J. Solid-State Circuits vol. 29 pp. 226-237 Mar. 1994.
6. R. Gharpurey and R. G. Meyer Modeling and analysis of substrate coupling in integrated circuits IEEE J. Solid-State Circuits vol. 31 pp. 344-353 Mar. 1996.
7. P. Larsson dl/dt noise in CMOS integrated circuits Analog Integrated Circuits Signal Processing vol. 14 pp. 113-129 1997.
8. E. Charbon P. Miliozzi L. P. Carloni A. Ferrari and A. SangiovianniVincentelli Modeling digital substrate noise injection in mixed signal IC's IEEE Trans. Computer-Aided Design vol. 18 pp. 301-310 Mar. 1999.
9. J. R. Brews The submicron MOSFET in High-Speed Semiconductor Devices S. M. Sze Ed. New York: Wiley 1990 ch. 3.
10. S. J. Hillenius MOSFET's and related devices in Modern Semiconductor Devices S. M. Sze Ed. New York: Wiley 1998 ch. 3.
11. A. G. Chynoweth lonization rates for electrons and holes in silicon Phys. Rev. vol. 109 no. 5 p. 1537 1958.
12. T. Y Chan P. K. Ko and C. Hu A simple method to characterize substrate current in MOSFET's IEEE Electron. Device Lett. vol. EDL-5 pp. 505-507 Dec. 1984.
13. M.-C. Hu and S.-L. Jang A complete substrate current model for submicrometer and deep submicrometer MOSFETs Int. J. Electron. vol. 83 no. 2 pp. 159-176 1997.
14. J. D. Bude and M. Mastrapasqua Impact ionization and distribution functions in sub-micron nMOSFET technologies IEEE Electron. Device Lett. vol. 16 pp. 439-441 Oct. 1995.
15. C. Jungemann B. Meinerzhagen S. Decker S. Keith S. Yamaguchi and H. Goto Is physically sound and predictive modeling of NMOS substrate currents possible? Solid-State Electron. vol. 42 no. 4 pp. 647-655 1998.
16. AT&T Design Automation ADVICE-Accurate Design Verification for Electronic Circuits User's Guide Release 4.0 1994.
17. C. C. McAndrew B. K. Bhattacharyya B. K. Wing and AT&T Design Automation The ASIM3 IGFET Model Version 1.0 AT&T Tech. Memo. 52864-910201-01TM 1991.
18. T. Y Chan J. Chen P. K. Ko and C. Hu The impact of gate-induced drain leakage current on MOSFET scaling IEDM Tech. Dig. pp. 718-721 1997.
19. A. Toriumi M. Yoshima M. Iwase Y Akiyama and K. Taniguchi A study of photon emission from n-channel MOSFET's IEEE Trans. Electron. Devices vol. ED-34 pp. 1501-1508 July 1987.
20. K. Sakui S. S. Wong and B. A. Wooley The effects of impact ionization on the operation of neighboring devices and circuits IEEE Trans. Electron. Devices vol. 41 pp. 1603-1607 Sept. 1994.
21. S. Tarn and C. Hu Hot-electron-induced photon and photocarrier generation in silicon MOSFET's IEEE Trans. Electron. Devices vol. ED-31 pp. 1264-1273 Sept. 1984.
22. T. J. Gabara W. C. Fischer J. Harrington and W. W. Troutman Forming damped LRC parasitic circuits in simultaneously switched CMOS output buffers IEEE J. Solid-State Circuits vol. 32 pp. 407-4418 Mar. 1997.